Numem at the Design & Reuse IP SoC Silicon Valley 2024
SUNNYVALE, CA, UNITED STATES, April 24, 2024 -- Numem, the pioneering provider of Memory SOC IPs and Chip/Chiplets, is excited to announce that Numem CEO Jack Guedj will discuss cutting-edge memory solutions at the Design & Reuse IP SoC Silicon Valley 2024 event, which will take place on April 25th, 2024, at the Hyatt Regency Santa Clara, CA. We invite you to join us for this insightful session.
- Date / Time : April 25th / 9:30 am – 10:30 am
- Place : Room B at the Hyatt Regency Santa Clara
- Session : Chiplet Solutions
- Topics : Chiplet-Based Compressed LLC Cache & Memory Expansion IP Solutions
- Link : https://www.design-reuse-embedded.com/ipsocdays/2024/SiliconValley/
Through this event, we will present our state-of-the-art low-power NuRAM Memory (MRAM-Based) and our SmartMem SOC Subsystem, IP Cores and Memory SOC Chiplets. Numem NuRAM's memory is 2-3X smaller in area and 85x - 2000x lower leakage power than SRAM. It is augmented by our SmartMem SOC Subsystem, which includes:
- SmartMem PEP (Performance, Endurance, and Power) Engine: Dramatically improves memory endurance and performance as well as operating power not only for Numem NuRAM but for all persistent memory types (MRAM, ReRAM, PCRAM, etc.) and both embedded and external Flash
- SuperBIST: Fast device bring-up/testing, continuous diagnostics.
- SmartMMC: Simplified memory operation, power/performance optimization.
- Compute/Processing: Enabling 5~10x area reduction or increased density with ZeroPoint technology
About Numem
Numem, headquartered in Sunnyvale, California, is the leading provider of Memory and SOC Subsystem IPs and Chip/Chiplets based on proven foundry MRAM process. Numem’s patented NuRAM technology enables best in class power/performance and reliability with 2.5x smaller area and >85x lower leakage power than traditional SRAM. Numem’s SmartMem technology significantly improves performance and endurance as well as ease-of-use and reliability for high-volume deployment. Numem Chip/Chiplets enable significant power reduction in AI systems from Edge Node to Server applications. Numem SmartMem can be used in conjunction with other memory technologies including MRAM, RRAM, PCRAM or Flash. It has optional and customizable SOC Compute in Memory which enables to further reduce power or increase effective density.
Visit our website at www.numem.com or contact us at info@numem.com.
|
Related News
- eInfochips to Exhibit and Present at Design & Reuse IP-SoC Silicon Valley 2020
- Silicon Creations Awarded TSMC's 2024 Open Innovation Platform Partner of the Year for Mixed Signal IP
- Worldwide Silicon Wafer Shipments Increase 7% in Q2 2024, SEMI Reports
- Dream Chip and Cadence Demo Automotive SoC Featuring Tensilica AI IP at embedded world 2024
- NUMEM & IC'ALPS Collaborate to Develop an ultra-low-power SOC for Sensor and AI applications
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |