Semiwise, sureCore, and Cadence Showcase Breakthrough in Cryogenic CMOS Circuit Development for Quantum Computing and Energy-Efficient Data Centers

June 24, 2024 - In a leap towards revolutionizing quantum computing and enhancing the energy efficiency of data centers, Semiwise, sureCore, and Cadence have collaborated to overcome critical challenges in developing cryogenic CMOS circuits. The collaborative effort has culminated in the successful modification of transistor models on GlobalFoundries 22FDX^® in the Cadence^® Spectre^® Simulation Platform, thereby enabling the process of analog, mixed-signal, and digital circuit simulation and verification at cryogenic temperatures.

The milestone reached in this collaboration springs from the Semiwise Innovate UK project “Development of CryoCMOS to Enable the Next Generation of Scalable Quantum Computers,” during which Semiwise crafted the first robust transistor SPICE models designed to function in extreme cryogenic environments. This advancement is pivotal for quantum computing, drastically increasing the potential number of qubits within a system and significantly expanding the computational capabilities necessary for tackling complex, real-life problems.

"We were able to develop production-worthy designs for cryogenic CMOS circuits by using cryogenic transistor measurements performed by Incize in conjunction with a leading commercial TCAD simulator. This allowed us to create PDK-quality compact transistor models that include corners and mismatch," said Professor Asen Asenov, CEO of Semiwise.

sureCore CEO Paul Wells said, “The critical storage element, the bit cell, must essentially be treated as an analog circuit that is very sensitive to process variability and mismatch. When we develop new memory designs and their associated compilers, we need to run thousands of statistical circuit simulations to guarantee the yield and reliability of our IP.”

“We are excited to work with Semiwise and sureCore in developing models in the Spectre Simulation Platform for use on cryogenic CMOS circuits,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group, Cadence. “We are delighted that the Spectre Simulation Platform now has calibrated SPICE models for cryogenic environments.”

The first 22FDX SRAM tapeout by sureCore to validate both recharacterized standard cells and a range of embedded memory IP in the framework of the Innovate UK CryoCMOS project, enabled by the modifications in Cadence’s Spectre Simulation, is scheduled for early 2024. This development is a testament to collaborative innovation and future quantum computing and semiconductor technology advancements.

The Spectre Simulation Platform is a comprehensive design and verification solution that leverages advanced simulation engines to meet the evolving needs of designers. It offers a flexible and reliable abstraction that enables designers to preserve their results and IP as they progress through the design cycle. With the ability to simulate everything from architectural exploration to final analog and mixed-signal full-chip verification, this platform delivers increased productivity and throughput. Additionally, the Spectre platform is built on an advanced infrastructure, ensuring it meets the most demanding simulation requirements of designers. The Spectre Simulation Platform supports Cadence's Intelligent System Design^™ strategy, enabling SoC design excellence.

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