Bluetooth low energy v5.4 Baseband Controller, Protocol Software Stack and Profiles IP
Building Intel's Foundry Ecosystem for the AI Era
Intel Foundry ecosystem partners add reference flows for Intel’s EMIB advanced packaging technology
June 24, 2024 -- Today marks a new milestone in the growth of Intel Foundry’s design ecosystem as key partners Ansys, Cadence, Siemens, and Synopsys have announced the availability of reference flows for Intel’s embedded multi-die interconnect bridge (EMIB) advanced packaging technology. This comes on the heels of recent announcements where those same partners declared readiness for Intel 18A designs.
“Today’s news shows how Intel Foundry continues to combine the best of Intel with the best of our ecosystem to help our customers realize their AI systems ambitions.” –Suk Lee, vice president for Ecosystem Development, Intel Foundry
Why It Matters: The success of Intel Foundry is rooted in collaboration with a vibrant design ecosystem. This ensures customers can access our leading process and packaging technologies.
Now, in collaboration with our ecosystem partners, we are making it as easy and as fast as possible for companies to optimize, fabricate and assemble their system-on-chip designs through our foundries, while enabling their designers with validated EDA tools, design flows and IP portfolios for silicon-through-package design. This systems foundry approach allows our customers to innovate at every layer of the stack so they can meet the complex computing demands of the AI era, where chip architectures increasingly rely on multiple CPUs, GPUs and NPUs in a package to achieve performance requirements.
How It Works: As companies look for new ways to innovate and extend Moore’s Law, we’re now seeing a majority of chips designed with heterogeneous architectures. Intel Foundry developed a groundbreaking approach called EMIB that makes it possible to cost-effectively scale to a larger silicon area by connecting multiple die in a single package. EMIB is a cost-effective approach that simplifies the design process and offers design flexibility. Our EMIB technology has already been proven in Intel’s own cutting-edge microprocessor products such as Intel® GPU Max Series (code-named Ponte Vecchio), 4th Gen Intel® Xeon® and Xeon 6 processors, and Intel Stratix® 10 FPGAs. We’re seeing growing interest from foundry customers as well.
Enabling customers to leverage this groundbreaking technology has been a priority. Intel Foundry has been working with all the key EDA and IP partners to ensure that their heterogenous design tools, flows and methodologies and reusable IP blocks are fully enabled and qualified to support customers who want to use our differentiated EMIB packaging technology for their projects. Announcements from our ecosystem partners this week include:
- Ansys is collaborating with Intel Foundry to deliver signoff verification of thermal and power integrity and mechanical reliability of Intel’s EMIB technology spanning advanced silicon process nodes to various heterogenous packaging platforms.
- Cadence announced the availability of a complete EMIB 2.5D packaging flow, digital and custom/analog flows for Intel 18A, and design IP for Intel 18A.
- Siemens also announced the availability of an EMIB reference flow for Intel Foundry’s customers. This is in addition to their announcement of Solido™ Simulation Suite certification for custom IC verification on Intel 16, Intel 3, and Intel 18A nodes.
- Synopsys announced the availability of its AI-driven multi-die reference flow for Intel Foundry’s EMIB advanced packaging technology, accelerating the development of multi-die designs.
Combined with ecosystem offerings for silicon design on all Intel Foundry nodes, EMIB-based package design enablement through the ecosystem helps set a solid foundation for our success as a systems foundry.
More Context: Intel’s role within the broader ecosystem has never been more critical in re-establishing stability and resiliency around the world. This week’s announcements demonstrate Intel Foundry’s commitment to building a robust ecosystem that already includes the foundational IP, system technology optimization, and EDA tools foundry customers rely on to customize and accelerate their next-generation silicon products.
A robust IP and EDA ecosystem is vital to any foundry business. And Intel Foundry – through the collaboration with companies like Synopsys, Siemens, Cadence and Ansys – is ensuring access to its leading-edge technologies, via the broadest possible ecosystem of design tools, flows, and reusable IPs for fabless customers to choose from.
|
Related News
- Partners Applaud Intel Foundry's Wider Ecosystem Approach
- X-Silicon Introduces the World's First Vulkan Driver Implementation for RISC-V, Enabling an entire Ecosystem of 3D Graphics, AI and Compute for Low-Power, Mobile, Edge and IOT Devices
- Kevin O'Buckley to Lead Foundry Services at Intel
- M31 Promotes Advanced SoC Development and Innovation at Intel Foundry's Direct Connect Event
- Siemens collaborates with Intel Foundry to contribute 3D-IC technology leadership for Intel's EMIB reference flow
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
E-mail This Article | Printer-Friendly Page |