SiFive Highlights Key Inflection Points Driving RISC-V Adoption for AI and Introduces Intelligence XM Series for AI Workload Acceleration
SiFive event showcases how the RISC-V standard is driving AI innovation
Santa Clara, Calif. – Sept. 18, 2024 – Today, SiFive, Inc. the gold standard for RISC-V computing, announced the SiFive Intelligence XM Series designed for accelerating high performance AI workloads. This is the first IP from SiFive to include a highly scalable AI matrix engine, which accelerates time to market for semiconductor companies building system on chip solutions for edge IoT, consumer devices, next generation electric and/or autonomous vehicles, data centers, and beyond.
Ad |
RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications 64-bit RISC-V Application Processor Core RISC-V-based AI IP development for enhanced training and inference |
As part of SiFive’s commitment to supporting its customers and the broader RISC-V ecosystem, SiFive also announced its intention to open source a reference implementation of its SiFive Kernel Library (SKL).
The announcement was made at a SiFive press event on Tuesday, Sept. 17 in Santa Clara, where executives discussed the leadership role the RISC-V architecture is playing at the core of AI solutions across a diverse range of market leaders, and provided an update on SiFive’s strategy, roadmap and business momentum.
SiFive’s new XM Series offers an extremely scalable and efficient AI compute engine. By integrating scalar, vector, and matrix engines, XM Series customers can take advantage of very efficient memory bandwidth. The XM Series also continues SiFive’s legacy of offering extremely high performance per watt for compute-intensive applications.
“Many companies are seeing the benefits of an open processor standard while they race to keep up with the rapid pace of change with AI. AI plays to SiFive’s strengths with performance per watt and our unique ability to help customers customize their solutions,” said Patrick Little, CEO of SiFive. “We’re already supplying our RISC-V solutions to five of the ‘Magnificent 7’ companies, and as companies pivot to a ‘software first’ design strategy we are working on new AI solutions with a wide variety of companies from automotive to datacenter and the intelligent edge and IoT.”
RISC-V was originally developed to efficiently support specialized computing engines including mixed-precision operations,” said Krste Asanovic, SiFive Founder and Chief Architect. “This, coupled with the inclusion of efficient vector instructions and the support of specialized AI extensions, are the reasons why many of the largest datacenter companies have already adopted RISC-V AI accelerators.”
As part of his presentation, Krste introduced more details on the new XM Series which broadens its Intelligence Product family. The XM Series also continues SiFive’s legacy of offering extremely high performance per watt for compute-intensive applications. Featuring four X-Cores per cluster, a cluster can deliver 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. There is 1TB/s of sustained memory bandwidth per XM Series cluster, with the clusters being able to access memory via a high bandwidth port or via a CHI port for coherent memory access. SiFive envisions the creation of systems incorporating no host CPU or ones based on RISC-V, x86 or Arm.
Those interested in learning how to access the open source SKL or learn more about the XM family or other AI solutions from SiFive can contact us at AIsolutions@sifive.com. SiFive will be at the RISC-V Summit North America, taking place Oct. 22-23, 2024 in Santa Clara, Calif. To schedule an on-site meeting, please contact your sales representative or contact sales.
About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.” https://www.sifive.com/.
|
Related News
- SiFive Announces Differentiated Solutions for Generative AI and ML Applications Leading RISC-V into a New Era of High-Performance Innovation
- Fractile Licenses Andes Technology's RISC-V Vector Processor as It Builds Radical New Chip to Accelerate AI Inference
- SiFive and Arkmicro Accelerate RISC-V Adoption in Automotive Electronics with SiFive's Automotive IP for the High-end SoC Market
- SiFive Announces New High-performance RISC-V Datacenter Processor for Demanding AI Workloads
- X-Silicon Introduces the World's First Vulkan Driver Implementation for RISC-V, Enabling an entire Ecosystem of 3D Graphics, AI and Compute for Low-Power, Mobile, Edge and IOT Devices
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |