Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
Companies to cooperate on leading technologies in HPC and RISC-V design to enable the next generation of supercomputers
MOUNTAIN VIEW, Calif., November 18, 2024 – Esperanto Technologies™, a leading developer of RISC-V chips and software for high-performance computing (HPC) and artificial intelligence (AI), today announced that they are cooperating with NEC Corporation on the roadmap for next-generation chips and software for HPC computing. The goal of the cooperation is to facilitate the further development of hardware and software solutions to enable the next generation of supercomputers based on the RISC-V instruction set. The cooperation is expected to leverage NEC’s deep experience and expertise in HPC supercomputer design and development of HPC software stacks along with Esperanto’s technology and expertise in high-performance energy-efficient multiprocessor chips based on the RISC-V instruction set.
Ad |
RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications 32-bit Embedded RISC-V Functional Safety Processor 64-bit RISC-V Application Processor Core |
NEC Corporation has a long and influential history in supercomputing and HPC, providing systems that meets customer needs by integrating its CPU, GPU and vector solutions. What makes the company unique is their vector processor, which has been developed over decades. NEC’s expertise in vector architecture distinguished its machines in fields requiring large-scale numerical computation, such as weather forecasting and scientific research. In recent years, NEC has been active in integrating AI and machine learning capabilities into its supercomputing solutions, expanding its role in diverse areas from scientific research to industrial applications.
Esperanto Technologies develops high-performance processors and software for both HPC and AI applications. Compatible with the free and open RISC-V instruction set architecture, Esperanto’s chips deliver high performance per watt. Esperanto’s first product, the ET-SoC-1, packs over one thousand RISC-V cores on a single chip, providing high throughput for AI inference workloads while keeping power consumption low – typically under 30 watts – a critical advantage for data centers and edge computing. Next-generation products under development will add features for HPC and a broader set of AI applications. Esperanto’s expertise lies in designing scalable, energy-efficient and massively parallel architectures optimized for HPC and AI. As a founder of RISC-V International, Esperanto has played a significant role in the growing RISC-V ecosystem.
“By leveraging NEC’s deep experience and expertise in HPC, and harnessing the free and open, industry-standard RISC-V instruction set combined with Esperanto’s energy-efficient compute technology, we’re able to develop scalable, efficient AI plus HPC solutions that are both high-performance and energy-efficient,” said Art Swift, president and CEO of Esperanto Technologies. “We are looking forward to starting this strategic collaboration with NEC which will help advance supercomputing solutions by improving performance per watt while helping Esperanto to realize chip-level solutions for combined AI plus HPC workloads.”
“Migrating supercomputing to a more energy-efficient solution compatible with the RISC-V architecture presents a transformative opportunity for data centers worldwide. By reducing energy consumption without sacrificing performance, we can not only lower operating costs but also significantly reduce greenhouse gas emissions—key to building a more sustainable computing ecosystem,” said Masaki Kondo, senior director, HPC Department at NEC Corporation. “We are looking forward to the collaboration with Esperanto, which aligns with our vision for supporting the RISC-V ecosystem in both chips and software to meet the growing demands of high-performance computing while reducing data center power demands.”
About Esperanto Technologies
Esperanto Technologies Inc. delivers massively parallel, high-performance, energy-efficient computing solutions that offer a compelling choice for the most demanding Generative AI and non-AI applications. The changing, computationally intensive workloads of the machine learning era mandate a new clean-sheet solution, shedding the baggage of existing legacy architectures, and the programmability limitations of overspecialized hardware. Esperanto leverages the simple, elegant, open standard RISC-V instruction set architecture (ISA) to deliver flexibility, scalability, performance and energy-efficiency advantages. For more information, please visit https://www.esperanto.ai/
About NEC Corporation
NEC Corporation has established itself as a leader in the integration of IT and network technologies while promoting the brand statement of “Orchestrating a brighter world.” NEC enables businesses and communities to adapt to rapid changes taking place in both society and the market as it provides for the social values of safety, security, fairness and efficiency to promote a more sustainable world where everyone has the chance to reach their full potential. For more information, visit NEC at https://www.nec.com.
|
Related News
- Esperanto Technologies Plans Energy-Efficient Chips for Artificial Intelligence and Machine Learning, based on the open RISC-V standard
- The role of RISC-V in the European Processor Initiative - Interview with Roger Espasa
- LDRA Announces Extended Support for RISC-V High Assurance Software Quality Tool Suite to Accelerate On-Target Testing of Critical Embedded Applications
- Semidynamics on major recruitment drive for RISC-V software engineers
- DeepX Hints At Next-Gen AI Chips
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |