Elixent strengthens patent portfolio: four more patents issued for reconfigurable technology advances
Bristol England, 16 June, 2003: Elixent, the leader in reconfigurable semiconductor IP, has been awarded a further four patents pertaining to its reconfigurable algorithm processing architecture, D-Fabrix. The US patents enable the company to protect its intellectual property while developing further solutions for the reconfigurable market. Customers can take advantage of Elixent's dynamically reconfigurable D-Fabrix array, lessening power consumption, minimising silicon area and avoiding costly respins.
"We're very happy to complete the patent application and approval process in the US," commented Alan Marshall, CTO at Elixent. "Now we can continue our ongoing research and development, expanding further on the ideas put forward in these patents for reconfigurability."
The newly issued patents cover; the integration of multipliers in programmable arrays; reconfigurable processor devices; field programmable processor arrays; and the method and apparatus for providing instruction streams to processor devices. The techniques described in these patents have allowed Elixent to bring the D-Fabrix array to market, making a whole new class of truly multi-functional platform devices available to customers.
About Elixent's reconfigurable algorithm processing (RAP) architecture
Elixent's D-Fabrix RAP platform provides the lowest power reprogrammable solution for implementing algorithm processing in SOC devices. It does this using post-fabrication reconfigurable arrays, giving cost-effective silicon utilisation and reuse. D-Fabrix allows the creation of a "virtual hardware" accelerator for every algorithm in a system. By virtue of reconfigurability, it can implement multiple hardware accelerators in minimal silicon area, giving high utilisation. Additionally, this reconfigurability allows functionality to be added or changed post-fabrication, enabling bugs to be fixed, new functions to be added, or even the whole chip to be customised.
D-Fabrix maps algorithms to a fine-grained processing array made up of ALUs, registers and memories, giving it a unique ability to adapt to any algorithm or datapath width. This provides a solution with the flexibility of a processor, while its low power and high performance attributes are closer to that of a fixed-function hardwired ASIC.
While power consumption is obviously a major advantage for developers of next-generation mobile devices, it is also a benefit to those developing fixed applications – eliminating the need for fans, or cost-reducing the power supplies. In addition, through dynamic reconfiguration, Elixent's D-Fabrix array allows for a high degree of silicon reuse, leading to low device cost. In benchmarks against standard DSP processors, D-Fabrix provides a 10x improvement in power consumption while still providing significantly more performance in similar silicon area. D-Fabrix enables a new class of platform device that can be truly multi-functional - supporting multiple applications, and adapting efficiently to changing specifications.
About Elixent
Elixent is the leader in reconfigurable semiconductor IP. D-Fabrix, the company's patented reconfigurable algorithm processing (RAP) technology provides solutions for companies producing electronic products for imaging and communications applications in consumer and industrial markets. Visit http://www.elixent.com for more information.
|
Related News
- Secure-IC strengthens its innovation leadership in embedded cybersecurity with the acquisition of eShard patents portfolio
- ARM Announces Participation in a Consortium to Acquire Rights to MIPS Technologies' (MIPS) Portfolio of Patents
- NetLogic Microsystems Strengthens its Innovation and Technology Leadership with Expanded Patent Portfolio
- Open-Silicon Strengthens Patent Portfolio with Test Technology
- Patriot Scientific Growth Strategy Advances as Kenwood Joins Steadily Expanding Roster of MMP Patent Portfolio Licensees
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |