Advantest's new system-on-chip tester handles fast MPUs, mixed-signal ICs too
Advantest's new system-on-chip tester handles fast MPUs, mixed-signal ICs too
By Semiconductor Business News
July 9, 2001 (5:04 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010709S0016
SANTA CLARA, Calif. -- Advantest America Inc. here today rolled out a new high-end tester that is designed to handle the world's fastest and most complex processors, system-on-a-chip (SoC) products, and mixed-signal devices, according to the company. Advantest said its new series of automatic test equipment (ATE), dubbed the T6683 SOC Test System, is ideal for production IC testing or high-end characterization. The T6683 is geared to test or characterize high-speed processors, reportedly including Intel Corp.'s Pentium 4 chips. According to the U.S. subsidiary of Japan's Advantest Corp., the new tester has the speed and edge-placement accuracy for processors supporting Rambus Inc.'s memory interface technology. The T6683 also includes a full suite of analog instruments, enabling the system to support multi-site, mixed-signal testing applications as well, said the company. The system is a 1,024-pin machine, featuring Advantest's "MULT-pin ar chitecture." The company said this ATE architecture, which provides up to 1-GHz at-speed performance, also enables the system to handle three programmable tester channel interface options at each one of the pins. The tester also uses a 2-GHz high-speed clock and a new 256-amp power supply with ultra-low voltage fluctuation. The system's immersion-cooled test head is the smallest in the industry, enabling short signal lengths and easy maneuverability in test applications. Shipments of the T6683 will commence in July of this year. The system will start at $2.4 million.
Related News
- Actel Design Environment Enables Fast, Easy Implementation of World's First Mixed-Signal FPGA
- Lattice Mixed-Signal Power Manager Devices Will Simplify Thales' System Design
- Actel's Enhanced Libero IDE Offers 'Smart' Functionality for Fusion Mixed-Signal FPGAs
- Actel Unveils Development Ecosystem for Industry's First Mixed-Signal FPGAs
- ChipIdea Mixed-Signal IP Enables Haier-IC SoC products Fast Time-to-Market and High Production Yield
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |