IBM introduces powerful software to speed development of custom chips

IBM introduces powerful software to speed development of custom chips

East Fishkill, N.Y.- June 18, 2001 - IBM today announced two powerful software design tools intended to help developers of customized microchips bring their products to market faster.

These new software tools -- the IBM Blue Logic Methodology Guide and the IBM Blue Logic System-on-a-Chip (SOC) Design Kit -- were created to provide engineers a significantly enhanced user interface, added levels of flexibility and tailored, automated and streamlined custom logic solutions, all aimed at helping provide a faster time to market.

"These new offerings build on our leadership as the number one application-specific integrated circuits (ASICs) supplier worldwide," said Jeff VerHeul, vice president of product development, IBM Microelectronics. "IBM's reusable plug-and-play concept focuses on reducing a customer's development cycle time and with the design kit, in some cases, bring this down from 16 months to between four and six months."

The new offerings work in conjunction with IBM's comprehensive family of Blue Logic custom logic products and services.

Blue Logic Methodology Guide
IBM's Blue Logic Methodology Guide is a simpler, consistent user interface for application-specific integrated circuit (ASIC) design tools and methodologies -- so simple, in fact, that no preexisting knowledge of IBM Blue Logic Methodology is required. The new guide can be thought of as a step-by-step "advisor" that walks the user through the design process to help get a design right the first time.

This new guide features automatic methodology guidance, structured design data organization, multi-platform and parallel processing support, automated notification of model and tools upgrades and turn-around-time tracking. All these features are available to help customers easily adapt to IBM's ASIC methodology and "design expertly" with a broader range of tools.

The guide's Process Supervisor, for instance, manages and automates UNIX-based job processes, ensuring that platforms and process steps are compatible for each design task. Designers also can use this guide to track job processes in real time from a simple GUI interface that lets them pause, continue or terminate the process.

IBM's Blue Logic Methodology Guide is planned for beta release by the end of next month with production release expected late this year. IBM plans to deliver this guide as part of IBM's ASIC Design Kit.

IBM Blue Logic SOC Platform-Based Design Kit
Developing a SOC design at a faster pace than in the past is a daunting challenge that many ASIC engineering teams face in the chip industry. IBM's Blue Logic SOC Platform-Based Design Kit can, in some cases, reduce the cycle time of SOC integration from 16 months to between four and six months. It is based on IBM's PowerPC 405-based superstructure and CoreConnect architecture, using the mature design methodology of the IBM SA-27E ASIC design system based on 0.18 micron technology.

The kit's advanced design reference tools can help even novice designers optimize the complicated SOC design process.

It does so through several new features, including real-world simulations that show how to add or subtract cores from the PowerPC 405-based superstructure. It eliminates a "start from scratch" approach that can hinder cycle time, opting for a "pre-stitched" platform based design employing systematic reuse of verification software, tools and methods. This can enable a greatly reduced time to market. A pre-built architecture also can reduce a chip integration project's risk.

A production version of the IBM Blue Logic SOC Platform-Based Design Kit for PowerPC 405, in SA-27E technology, is planned for availability in 4Q01. A beta version of the design kit is expected to be available by the end of this month.

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