Cores, arrays set sights on CAM market

Cores, arrays set sights on CAM market
By Loring Wirbel, EE Times
October 14, 2003 (11:56 a.m. EST)
URL: http://www.eetimes.com/story/OEG20031014S0016

DENVER — Given the soft state of content-addressable-memory markets for network search, HyWire Ltd.'s push into search engines may seem ill-timed. But the company maintains an algorithm advantage will give its HyCognito parts, aimed at soft-core or embedded-array implementations, a cost and performance edge over ternary CAMs and other search engines.

HyWire founder Moshe Stark has designed network processors at MMC Networks Inc. and developed floating-point units and Fast Ethernet MACs at Intel Corp. He said his team's search algorithms are a superset of ternary-CAM concepts but are far more efficient, achieving 400-Msample/second search speeds.

The algorithms do not use decision-tree or hash-based structures but rather deterministic procedures operating at Layer 2 and Layer 3. "This allows us to handle true classification as well as search," Stark said.

The search algorithms were first demonstrated at last fall's Network Pr ocessors Conference West, when HyWire (Netanya, Israel) showed a module-level version of its Range Search Engine (RSE). The company plans to offer the RSE in a standard embedded array with on-chip memory, based on a standard 0.18-micron process, at the end of this year. Next year, HyWire will add soft cores to integrate the search logic into customers' ASICs.

HyWire has been working with Infineon Technologies and Micron Technology on using the engine with RL-DRAM and is exploring the FCRAM from Fujitsu as well. Because the RSE design can integrate counter and timer groups on-chip and can use standard DRAMs without special buses, the search engine design can be implemented cheaply, yet search table space can expand to multiple-million-deep lookup tables. Each data entry can be associated with a specific counter/timer on a per-prefix or per-access control list basis, allowing for efficient pipelined searches.

The key to the HyWire device efficiency is the algorithmic ability to transform packet prefixes into ranges using software. Unusual conditions such as range overlaps can be handled efficiently, whereas straightforward TCAM lookup can be redundant in supporting multidimensional quality-of-service or security functions.

The HyCognito devices are called Search Engine Managers (SEMs), since they constitute the logic for turning DRAMs into lookup devices. The ASSP single-chip devices, based on the RSE, are intended to handle 10-Gbit/second OC-192 or 10-Gbit Ethernet networks, analyzing IPv4 (6 million-entry) or IPv6 (4 million-entry) packets.

At $250 each in 10,000-unit quantities, the ASSP's price is less than an 18-Mbit ternary CAM, yet the part can offer the same search capabilities as 12 TCAMs with IPv4 or 32 TCAMs for IPv6, HyWire said.