Virage Logic Appoints IP Strategist Jim Ensell Vice President of Marketing
FREMONT, Calif., October 23, 2003 — Virage Logic Corporation (Nasdaq:VIRL), a leading provider of best-in-class semiconductor IP platforms, today announced the appointment of Jim Ensell as vice president of marketing. Responsible for worldwide marketing, Ensell will report directly to Adam Kablanian, president and CEO, Virage Logic.
Ensell joins Virage Logic from fabless custom IC maker eSilicon where he most recently held the position of vice president, business development and chief information officer (CIO). In this position Ensell was responsible for IP strategy, IP and EDA relationships, program management, IT and eBusiness application development. Prior to eSilicon, Ensell held positions as senior vice president of products and services at Zland, an internet eBusiness provider, and served as vice president of marketing at Cadence Design Systems’ Deep Submicron Business Unit.
“Jim is an excellent addition to our management team,” said Adam Kablanian, president and CEO, Virage Logic. “His knowledge of the IP industry and his experience in architecting technology platforms for IC design is a strong asset for Virage Logic, especially as we apply our Technology-Optimized Platforms to the next generation of submicron designs.”
“Virage Logic has attained a leadership position in the silicon IP arena by consistently delivering innovative, silicon-proven products such as its Self-Test and Repair (STAR) Memory System that provides customers with a unique competitive advantage,” said Ensell. “I look forward to working with Virage Logic’s talented management team to help drive the company’s semiconductor IP platform strategy and take the company to its next phase of growth.”
Ensell serves as chairman of the IP Committee of the Fabless Semiconductor Association (FSA). He leads an industry effort initiated by the FSA board of directors to address issues associated with the use of third-party IP in fabless semiconductor companies and led the formation of working groups addressing IP quality, education and baseline business standards.
Ensell graduated from Villanova University with a Bachelor of Science degree in Electrical Engineering. He was awarded a Master of Science degree in Electrical Engineering from the University of Pennsylvania.
About Virage Logic
Virage Logic Corporation (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os, and IP development tools that are silicon-proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and computer and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000.
###
Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995:
Statements made in this news release, other than statements of historical fact, are forward-looking statements, including, for example, statements relating to trends, business outlook, products, and customer relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic’s ability to forecast its business, including its revenue outlook; Virage Logic’s ability to execute on its strategy to become a provider of semiconductor IP platforms; Virage Logic’s ability to continue to develop new products and maintain and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic’s technologies by semiconductor companies and increases in the demand for their products; the company’s ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies; the company’s ability to obtain royalty revenues from customers in addition to license fees, to receive accurate information necessary for calculating royalty revenues and to collect royalty revenues from customers; business and economic conditions generally and in the semiconductor industry in particular; competition in the market for semiconductor IP platforms; and other risks including those described in the company’s Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic’s other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC’s website (www.sec.gov), and in news releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
All trademarks and copyrights are property of their respective owners and are protected therein.
|
Related News
- GLOBALFOUNDRIES Appoints Vice President of Marketing
- Virage Logic appoints Vice President of Business Development
- Leopard Logic Appoints Stefan Tamme As Vice President of Sales and Marketing
- Virage Logic Appoints Industry Veteran Vice President of Worldwide Sales
- Quadric Appoints Former Arm Vice President Steve Roddy as Chief Marketing Officer and Accelerates the Licensing of Its GPNPU Architecture
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |