English
Novas and Denali team to speed debugging using memory subsystem information
NOVAS AND DENALI TEAM TO SPEED DEBUGGING USING MEMORY SUBSYSTEM INFORMATION
Denali integrates MMAV with Debussy, joins Novas' Harmony Program
SAN JOSE, Calif., June 7, 2001--Novas, the leader in debug systems for complex chip designs, and Denali, a world leader in high-performance memory subsystem design and verification, today announced that Denali's Memory Modeler Advanced Verification (MMAV) is now integrated with Novas' Debussy(r) debug system. MMAV is the industry-standard solution for modeling and simulating memory, and the most advanced verification IP for system-level verification and debugging.
With the complexity of today's memories, tracking down bugs in complex systems is difficult and time-consuming. But with the integration of Debussy and MMAV, customers can easily view, edit, and manipulate memory data and memory transactions to quickly locate and isolate system-level bugs. Compatibility between the two companies' products is assured as Denali has joined Novas' Harmony program, through which Novas provides access to Debussy and support for product integration, improving productivity for mutual customers.
"Novas is committed to open systems and partnerships that reduce the cost of using EDA tools for chip design by lowering interoperability costs," said Scott Sandler, president and CEO of Novas. "The integration of Denali's MMAV with Debussy is a great example of how Novas is partnering with leading companies to reduce the cost of the most expensive part of verification, which is the human effort required to understand the design."
"With Debussy and MMAV, designers can synchronize waveform views with data stored in memory," said Kevin Silver, vice president of marketing at Denali. "For any point in time, designers can instantly view the state of memory at that time. They can also see a history of data transactions - all the reads and writes - into and out of any memory location. Moving seamlessly between waveforms and memory information gives designers huge productivity gains in verification and debugging."
About Harmony
Novas established its Harmony program in 1999 to lower the cost of EDA tool interoperability. The Harmony program provides developers of verification and other tools with Debussy licenses, engineering support for integration efforts, and ongoing support for mutual customers. Debussy's open application programming interfaces (APIs) ensure that the widest range of chip design and verification solutions can take advantage of its industry-leading debug capabilities.
About Denali Software, Inc.
Denali Software, Inc. is the world's largest provider of comprehensive solutions for memory subsystem modeling, simulation and verification. Denali delivers its extensive database of memory models, powerful design verification software, and memory processor IP through its dedicated platform, eMemory.com. More than 3000 designers worldwide use Denali's tools, technology, and services to efficiently integrate new memory technologies into complex system designs for communication, consumer, and computer products. For more information, contact Denali at http://www.denalisoft.com or call (650) 325-7241.
About Novas
Novas is the leader in debug systems for complex chip designs. The Company's Debussy(r) Total Debug system manages the design debug process for system-on-chip integrated circuits, dramatically reducing the time it takes to locate, isolate, and understand the causes of unexpected design behavior. Debussy increases designer and design team productivity during the time-intensive verification and debug phases. Novas has over 7,000 systems in use at hundreds of customer sites worldwide.
Novas is located at 2025 Gateway Place, Suite 480, San Jose, CA 95110.
Phone: 408-467-7888 or 888-NOVAS-38, Fax: 408-467-7889. For more information visit www.novas.com or send email to info@novas.com.
###
For more information contact:
| Eileen Elam KJ Communications 650-917-1488 KjcomE@cs.com | Maggie Albrecht Novas 408-467-7867 maggie@novas.com |
| Lois DuBois Cayenne Communication (650) 854-5485 lois.dubois@cayennecom.com | Kevin Silver Denali Software (512) 454-7004 x230 kevin@denalisoft.com |
Related News
- Faraday Collaborates with Novas to Accelerate Debugging of Designs Containing Memory IPs
- Novas, Denali Offer First Transaction-Level Verification and Debugging Environment for PCI Express Design Verification
- SiSoft and Denali Team to Deliver Signal Integrity Solutions for High-Speed Memory Systems
- CoWare and Denali Team to Speed Memory System Design and Verification
- SanDisk Taps Denali Software to Deliver Design Simulation Models to Speed Integration of Flash Memory Into Consumer Devices
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
|
E-mail This Article | 
|
|
Printer-Friendly Page |