New downloadable toolkit for Cambridge Consultants XAP2 processor takes the risk out of ASICs

• SDK allows evaluation of royalty-free processor for ASIC & FPGA projects
• meets rising demand for greater integration and reconfigurability in electronic products

December 8, 2003 - Cambridge Consultants launches a web-downloadable toolkit for its royalty-free RISC processor core, XAP2. The free-trial software development kit (SDK) allows users to write and simulate application software in C or assembler, to evaluate the 16-bit processor’s architecture for use in an SoC ASIC or FPGA project - at minimal risk.

Electronic OEMs are increasingly considering the advantages that highly-integrated digital or mixed analogue/digital ASICs can bring to product designs. The Cambridge Consultants Ltd (CCL) XAP2 RISC core and toolkit offers field-proven technology that can be implemented in as little as 12,000 gates - a size equating to a cost of less than 5 cents/Euro-cents of silicon. It is available as synthesisable RTL for use in FPGAs or with any ASIC silicon foundry offering a gate library. Unlike many cores offered as IP, XAP2 has a licence that requires no royalties per chip, a feature that can dramatically reduce bill-of-material costs for developers.

CCL’s first 16-bit processor was the 3000-gate XAP1 in 1994. The XAP2 followed in 1999. Both XAP cores have been used successfully in numerous IC projects, with production volumes over 10 million units - such as the leading Bluetooth chip.

The new XAP2 SDK is available for a free trial download. For developers new to high-end ASIC development this is an ideal way of exploring the hardware/software and analogue/digital system partitioning possibilities made possible by reconfigurable hardware. It additionally allows evaluation of the performance of a core optimised for on-chip use, which in this case employs a high-throughput Harvard architecture, as pin-out issues are of much less consequence than for a conventional (Von Neumann) packaged microcontroller.

"Electronic system architectures are evolving rapidly," says Alistair Morfey of CCL's Sensor ASICs Group. "This free-trial toolkit allows engineers to explore the characteristics and capabilities of reconfigurable RISC hardware before committing to the expense of an SoC or ASIC project."

CCL’s XAP2 SDK runs under Windows on a PC. It includes a powerful software development toolchain that will take a program written in C or assembler, compile and link the code, and execute it on a simulator. When users decide to take a XAP2 licence, they have access to a complete integrated development environment with rich debugging facilities. This includes an FPGA-based hardware emulation tool, and in-system fault analysis based on CCL’s patented non-invasive real-time SIF serial debugging interface. This accesses all of XAP2 address space while the core is running, without inserting any time delays.

XAP2 provides a Harvard architecture processor (separate program and data spaces) that is optimised for low power consumption. Power reduction techniques include an extensive use of single cycle instructions, with an instruction set chosen for power efficiency, and a sleep mode that uses virtually zero power (implementations have achieved quiescent current levels that are so low that 10-year battery lifetimes from a single button cell are possible). The architecture and instruction set also provide powerful arithmetic functions, for efficiency in real-time signal processing applications. Support includes hardware-accelerated multiply and divide operations, and a single-cycle shift barrel shifter for 32 bit arithmetic.

CCL also offers a XAP2 hardware emulator card. The XAP2 core complete with 8kB of RAM can be contained easily in less than 20% of the Xilinx XC2V3000 FPGA used in the emulator, leaving ample space for custom digital circuitry required for the rest of the product. It also has a defined connector interface for analogue daughter cards, so that a complete SoC can be emulated in hardware. FPGA implementations have been tested at 16MHz, and much faster speeds have been achieved in ASIC silicon.

Despite its small size, the XAP2 core is capable of delivering high real-time performance, enough to support a wide range of applications. These range from managing protocol stacks and application software in wireless systems such as Bluetooth or ZigBee, to the control and communications tasks required for accurate instrumentation and sensor applications such as gas meters, touchscreens and hydrogen-concentration sensors for fuel-cell cars. It can also support deeply-embedded products such as home automation, smart sensors or industrial measurement and control systems.

Click here to download the new XAP2 toolkit
Click here to download the XAP2 datasheet
Click here for more information on CCL's ASIC offerings

About Cambridge Consultants Limited (CCL)
Cambridge Consultants Limited (CCL) designs and develops innovative new products, processes and systems. The organisation enables clients to turn business opportunities into commercial successes, whether launching first-to-market products, or expanding existing markets through the introduction of new technologies. With a team of over 250 engineers and scientists, CCL is able to offer solutions across a diverse range of industries including healthcare, telecommunications, industrial and consumer products, automotive and aerospace. Operating from purpose-built laboratories on the Cambridge Science Park, CCL works for multinationals and small companies alike.