ARC International Introduces ARC 501 32-bit RISC Processor Core

SAN JOSE, Calif., December 15, 2003 – ARC International (LSE: ARK), a world leader in user customizable processors, peripheral IP, real-time operating system and development tools for embedded system design, today expanded its technical leadership by unveiling the ARC 501 processor core. As many 8- and 16-bit system developers upgrade to 32-bit processor systems for performance and cost reasons, they are often faced with architectures that severely impact their silicon and power targets. Delivered as synthesizable RTL, the ARC 501 processor core addresses these problems by providing a fixed processor configuration that combines a very low gate count and the 16/32 ARCompact ISA. As a result, the ARC 501 processor core is one of the smallest 32-bit microprocessor systems available, while outperforming 16-bit microprocessors by eleven to one.

“Our research uncovered an unmet need for system developers looking for 32-bit performance that did not sacrifice silicon area and power,” said Peter Hutton, VP/GM Processor Business Unit. “For customers accustomed to working with 8- and 16-bit microprocessors, the ARC 501 provides an ideal upgrade path that offers much higher performance without giving up code density or power efficiency. The ARC 501 is also fully supported by ARC’s class-leading development tools and software such as ARC’s embedded RTOS and MQX. By providing these essential components in addition to the ARC 501, we enable our customers to get to market more quickly with less risk. ”

The ARC 501 is a small, low-cost, 32-bit RISC, general-purpose processor. The microprocessor utilizes the ARCompact 16/32-bit ISA that results in a 30-40 percent reduction in code size over conventional 32-bit architectures and rivals the code footprint of 16-bit processors. The ARC 501 processor core includes an integrated barrel shifter and 32x32 scoreboarded multiplier. Additionally, the processor core features two timers, making it an ideal solution for those wanting to run an RTOS and/or use a watchdog timer. At the system level, the ARC 501 processor core supports an 8KB, 2-way instruction cache and the BVCI bus standard. A JTAG debug port is provided to enable debug communications. A BVCI target port is provided to connect to system memory, and a spare BVCI master port is also provided, allowing a user component to act as a master to the system memory.

Price and Availability
The ARC 501 is available now. For pricing information, please contact any ARC sales office at. http://www.arc.com/company/locations.html.

About ARC
ARC International is a world leader in embedded silicon and software SoC IP. ARC’s solutions accelerate development and optimise results minimize risk for customers developing a wide range next-generation wireless, networking, industrial control, storage and consumer electronics products. ARC introduced the industry’s first user-customizable 32-bit RISC/DSP processor core and the industry's first USB Hi-Speed On-The-Go IP. ARC’s turnkey embedded solutions, combining the processor core with a real-time operating system, development tools and peripheral hardware and software IP, enable developers to optimise the design and performance of their applications. By providing designers with a single source for all major embedded silicon and software IP building blocks, ARC dramatically reduces their number of suppliers, thereby reducing cost, reducing risk and reducing time-to-market.

ARC International employs approximately 180 people in research and development, sales and marketing offices across North America, Europe and Asia. Full details of the company’s locations and other information are available on the company’s website, http://www.arc.com. ARC International is listed on the London Stock Exchange as ARC International plc (LSE: ARK).

Statements made in this press release that are not historical facts include forward-looking statements that involve risks and uncertainties. Important factors that could cause actual results to differ from those indicated by such forward-looking statements include, among others, market acceptance of the ARC technology; fluctuations in and unpredictability of the Company’s quarterly results; general economic and business conditions; regulatory policies adopted by governmental authorities; assumptions regarding the Company’s future business strategy; changes in technology; competition; ability to attract and retain qualified personnel; risks associated with the Company’s international operations; and other uncertainties that are discussed in the “Investment Considerations” section of the Company’s listing particulars dated 28 September 2000 filed with the United Kingdom Listing Authority and the Registrar of Companies in England and Wales. The Company disclaims any intention or obligation to update any forward-looking statements as a result of developments occurring after the date such statement was first made. In view of the many applications in which its Licensees may use the ARC products, ARC cannot warrant that those applications do not infringe the patents of others. ARC strongly encourages its Licensees to become familiar with the policies governing the use and licensing of intellectual property established by any organization whose standards the Licensee wishes to follow, and to review the list most standards-promulgating organizations publish, of entities that claim to have patents relating to the relevant standards or underlying technology.

ARC, the ARC logo, ARCtangent, ARCangel, ARCompact, ARChitect, ARCform, CASSEIA, High C, High C/C++, SeeCode, MetaDeveloper, MetaWare, Precise Solution, Precise/BlazeNet, Precise/EDS, Precise/MFS, Precise/MQX, Precise/MQXsim, Precise/RTCS, Precise/RTCSsim are trademarks of ARC International. All other brands or product names are the property of their respective holders.

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