Mentor Graphics Announces Co-Verification Models for PMC-Sierra MIPS-based Microprocessors to Speed Verification of Embedded Applications
WILSONVILLE, Ore., December 16, 2003 - Mentor Graphics Corporation (Nasdaq: MENT) today announced the availability of the Seamless® Hardware/Software Co-Verification Processor Support Packages (PSPs) for PMC-Sierra's RM7000TM and RM7900TM 64-bit families of MIPS-basedTM microprocessors. The Seamless Processor Support Packages provide the ability to create virtual prototypes to validate that hardware and software work together in RM7000 and RM7900 series-based designs, including networking and storage applications, advanced consumer electronics and office equipment such as printers and digital copiers. By validating interfaces and analyzing performance prior to fabrication, systems designers can shave months off their development processes by speeding up the integration process, minimizing redesign cycles, and ensuring optimum system performance.
Mentor Graphics and PMC-Sierra collaborated closely on the development of the Seamless Co-verification Processor Support Packages, which have been validated against extensive test suites for the PMC-Sierra MIPS-based microprocessors. The Processor Support Packages implement the Seamless Version 5 Performance Profile viewer, which enables designers to profile software, chart memory transactions, monitor cache efficiency and plot bus utilization and arbitration delay. As a result, this data can be used to identify areas of concern and guide design improvements that yield greater performance. In addition, this collaboration enables C and RTL-based co-verification for PMC-Sierra microprocessors, streamlining the co-verification process.
"Mentor Graphics is a leader in hardware/software co-verification and we worked closely with its engineers to create and validate accurate microprocessor models that will help our customers bring their products to market faster," said Tom Riordan, vice president and general manager of the Microprocessor Products Division at PMC-Sierra. "Co-verification enables our customers to start the hardware/software integration process earlier in the design cycle, thereby shortening integration times and reducing the risk of requiring redesigns."
Ricoh Company, Ltd., a global leader in office equipment, recently evaluated and purchased the co-verification models. "Ricoh competes in the office product market, therefore, time-to-market and performance are keys to our market success," said Tadayoshi Miyahara, associate engineer of the Platform Development Center, Imaging System Business Group of Ricoh. "After careful evaluation, we have selected the Seamless Co-Verification microprocessor models for PMC-Sierra's MIPS-based microprocessors since this solution provides an early glimpse of hardware working with software. This allows us to validate that our hardware and software works correctly and efficiently with the PMC-Sierra MIPS-based microprocessor before we commit the design into hardware."
"Co-verification has become a primary consideration for designers frustrated by lengthy, costly and resource-intensive verification cycles," said Serge Leef, general manager of the system-on-chip verification division of Mentor Graphics. "PMC-Sierra's commitment to support our development of Seamless PSPs for its microprocessors has provided customers designing with its RM7000 and RM7900 families with a solution to verify critical interfaces and analyze system performance prior to committing the design to hardware."
About Seamless
Linking popular software development and debug tools with logic simulation, the Seamless environment delivers high performance co-verification months before a hardware prototype can be built. The Seamless environment enables software and hardware development to be parallel activities, removing software from the critical path and reducing the risk of hardware prototype iterations resulting from integration errors. User-controlled optimizations boost performance by isolating the logic simulator from software-intensive operations such as block memory transfers and algorithmic routines.
To this environment, Seamless Version 5 adds the ability to analyze code, bus and memory performance. These capabilities allow not only the validation of hardware/software interactions, but also give measurement on the quality of the system and guidance on where improvements can be made.
Availability
The Processor Support Packages developed for PMC-Sierra's RM7000 and RM7900 families are supported by Mentor Graphics and are available now for Solaris, and Red Hat Linux platforms. For more information on how to purchase these packages or to register for free co-verification and functional verification seminars, visit www.mentor.com/seamless.
About PMC-Sierra's RM7000 and RM7900 64-bit MIPS-based Microprocessors
PMC-Sierra's RM7000 and RM7900 families of MIPS-based microprocessors power a broad range of communications applications from network router control planes and enterprise switches to enterprise printers and advanced consumer electronics devices. They are also used for emerging applications such as storage, wireless base stations, multi-service access platforms, DSLAMs, and automotive telematics. For more information, visit www.pmc-sierra.com/processors.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $650 million and employs approximately 3,600 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.
Mentor Graphics and Seamless are registered trademarks of Mentor Graphics Corp. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners.
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