Zuken tool continues constraint-driven evolution
Zuken tool continues constraint-driven evolution
By Peter Clarke, EE Times
May 30, 2001 (2:00 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010530S0070
LONDON Board-level EDA software vendor Zuken Ltd. plans to introduce Hot-Stage 4, the latest version of its virtual prototyping environment, at the Design Automation Conference next month. Hot-Stage is evolving into a constraint-driven pc-board design system that Zuken said will provide "right by construction" pc boards that have been guided in their design by electrical and manufacturing rules and thermal and electromagnetic-compatibility (EMC) best practices. Hot-Stage is part of Zuken's Board Integrity flow. Hot-Stage 4 includes a separate spreadsheet-based constraints manager, an automatic constraints wizard, a what-if editor, an embedded router, online simulation, verification and both electromagnetic interference (EMI) and thermal analysis. In theory, Hot-Stage 4 allows engineers to solve signal-integrity, EMI, thermal and manufacturability problems without being bounced around the design spa ce in such a way that they could meet one constraint only by violating another. An engineer enters constraints, and the tool synthesizes the design to meet the requirements. A tree browser allows design navigation, and a spreadsheet allows electrical constraints to be edited and constraint violations to be displayed within a single interface. Layout 'with confidence' Neil Bufton, product manager for Hot-Stage, said design engineers can "identify suitable device and board technologies prior to physical design and quickly constrain the design to meet requirements. Layout engineers can realize the board with confidence that the designer's requirements have been met and that the design will be manufacturable." The what-if editor, Scenario Editor, can be used up front in the design process as a virtual scratchpad or when working with schematic packages from Zuken or other EDA vendors. It enables what-if experimentation with drivers, receivers, terminations and net topologies to ensur e realistic constraints are set. It allows experimentation in the same virtual environment to resolve problems with the physical design. The graphical interface can be used to edit net topologies or store user templates, which are then used to constrain the router. The router uses simulation to derive signal-delay information. The router embeds the designer's intent into the physical realization while ensuring that all manufacturability rules are followed. An embedded simulator enables verification of critical signals and batch verification of the whole design. Bundles are available for design, layout and EMC engineers on NT and Unix platforms, starting at about $22,000 per seat for a front-end-only design tool excluding physical tools. For the simplest version of Hot-Stage 4 with physical design, the license charge is about $27,000 per seat.
Related News
- Blue Pearl Software Introduces "No EDA Tool Purchase Plan"
- Lattice's ispLEVER 7.2 FPGA Design Tool Suite Continues to Elevate Designers' Productivity
- Beach Solutions Ensures Higher Quality IP with Metric Driven Tool
- Sequence tool performs interconnect-driven timing closure
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
E-mail This Article | Printer-Friendly Page |