Advantest steps up SoC test development in new U.S. R&D center

Advantest steps up SoC test development in new U.S. R&D center
By Mark LaPedus, Semiconductor Business News
February 13, 2002 (4:49 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020212S0013

SANTA CLARA, Calif. -- Japan's Advantest Corp. here has established a new U.S. R&D center that will help develop a future line of automatic test equipment (ATE) for system-on-a-chip (SoC) designs, according to the company's top U.S. executive.

The new "SoC Design Center," which is located within Advantest's U.S. headquarters in Santa Clara, is part of the company's overall strategy to bolster its VLSI logic/SoC test business, said Nicholas Konidaris, president and chief executive of Advantest America Corp. The Santa Clara-based company is the U.S. subsidiary of Japanese ATE giant Advantest.

The new R&D center will help define and develop new ATE platforms, which will meet the low-cost testing requirements for next-generation, SoC devices, Konidaris told SBN in an interview. "The design center will be a small operation that will support our current SoC testers and define a new [ATE] architecture," he said.

Advantest is currently recrui ting ATE engineers and designers to propel the development of its SoC test efforts, he said in the interview on Monday.

The Advantest executive did not elaborate on its future products, but noted the company hopes to address the next wave of complex SoC devices, especially chips being developed in the United States. "The U.S. is very dynamic in SoCs, especially in the communications market," he said.

Last month, Advantest dropped hints that it would open a design center at an undisclosed location, as part of the company's new and bold "rebirth" strategy. This "rebirth" strategy is also aimed to jumpstart its overall efforts in the ATE sector in 2002 (see Jan. 11 story).

Like all ATE vendors, Advantest suffered from what analysts believed was the worst downturn ever in this sector during 2001. In fact, the 2001 Top 10 list of semiconductor tool companies shows suppliers of ATE getting hammered hard by the industry's recession last yea r, according to the new rankings from VLSI Research Inc. of San Jose.

Boston-based Teradyne Inc., for example, fell completely out of VLSI Research's Top 10, from last year's No.4 spot. Japan's Advantest slipped from No.7 to 10 as its sales plunged 50.5%, from $1.865 billion in 2000, to $924 million in 2001, according to VLSI Research (see Feb. 11 story).

A key to Advantest's future growth is in the VLSI logic/SoC test arena, according to analysts. The company is the world's leading supplier of memory testers in terms of market share, but it is somewhat behind in the VLSI logic test space against its U.S. rivals, namely Teradyne, according to analysts.

"Advantest's medium-term goals are to maintain its current market share for memory test, where it holds 60% of the global market, while nearly doubling its share in the logic test market to 20%," said analyst Noriko Oki of Morgan Stanley Dean Witter & Co. in Tokyo in a recent rep ort about the ATE company.

"The company should have relatively little trouble to maintain its share in memory test, given the decline in surviving players [in the DRAM industry]," Oki said in the report. However, "the logic [ATE] market is much larger than the memory market," the report said.

But in the logic/SoC ATE business, Advantest is currently "making up for lost ground from the 1990s, when it fell behind U.S. makers due to slow software development," according to the report.

Advantest claims it is making up ground--and fast. "We are a big player in SoC," Konidaris contended. "We dominate the ASIC market."

It also claims to be the world's largest test vendors in terms of the so-called design-for-testability (DFT) market. In fact, the company has a huge installed base of DFT testers at IBM Corp. and other chip makers, sources said.

The company offers a range of testers for SOC applications, including the new T6683, a 1-GHz, 1024-pin system. Advantest claims the T6683 is the world's f astest VLSI logic tester (see July 9 story).