MorethanIP announces new 10/100/1000 Ethernet MAC-NET Core enabling Layer 3 Protocol acceleration for wire-speed TCP/IP implementations
Karlsfeld February 3, 2004 - MorethanIP announces new 10/100/1000 Ethernet MAC-NET Core. At high network speeds, or when CPU resources are limited, the processing load caused by network layers to perform TCP/IP or UDP/IP transactions can quickly become unacceptable as it reasonably slows down the complete system for processing the protocol overhead. In addition, timely and fast serving of network transactions is necessary to be able to use the available network bandwidth and to avoid unnecessary data corruption (e.g. due to buffer overflows) which would result in causing even higher network and processor load.
The MAC-NET Core addresses and removes these performance critical components from software and combines the proven MorethanIP Triple-Speed Ethernet MAC Core with Layer 3 Protocol acceleration functions enabling wire-speed TCP/IP Networking up to Gigabit environments.
|
Related News
- MorethanIP's 10/100/1000 Ethernet MAC Version 3 now with register map and full statistics support
- eASIC and MoreThanIP Partner to Deliver Tri-Mode (10/100/1000) Ethernet MAC Solutions for Nextreme Structured ASICs
- MorethanIP releases a new 10/100Mbps Ethernet MAC Core HW- and SW- compatible with MorethanIP 10/100/1000 MAC
- MorethanIP releases a new version of its 10/100/1000 Ethernet MAC Core featuring a configurable 8/32-Bit Client interface
- 10/100/1000 Gigabit Ethernet PHY IP Cores including MAC Controller is available for immediate licensing for your advanced SOC to drive Data faster and farther
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |