Lattice Releases IP Core for Next-Generation PCI Express Applications

HILLSBORO, OR - FEBRUARY 11, 2004 - Lattice Semiconductor Corporation (NASDAQ: LSCC), the inventor of in-system programmable^TM (ISP^TM) logic products, announced today the immediate availability of an Intellectual Property (IP) core for next-generation PCI Express^TM applications. Lattice's new PCI Express core is targeted at the company's ORT82G5 and ORT42G5 Field Programmable System Chips (FPSCs), which combine Lattice's sysHSI^TM SERDES technology with up to 10,000 field programmable gate array logic elements.

"As communications systems move to 10Gbps and beyond, PCI Express is poised to gather significant momentum in system interconnect applications," commented Stan Kopec, vice president of marketing at Lattice Semiconductor. "Our robust ORT82G5 and ORT42G5 FPSCs are already widely used in 10Gbit applications, particularly where serial I/O connectivity is a concern. Our PCI Express IP core will now offer system designers a powerful solution for this emerging interface when combined with our production-proven SERDES technology," Kopec added.

PCI Express technology is a high-performance, general purpose Serial I/O Interconnect defined for a wide variety of future computing and communication platforms. The basic premise of the PCI Express architecture is that existing host PCI software can remain compatible with an endpoint device without requiring new drivers or operating-system software. Salient PCI attributes, such as its usage model, load-store architecture, and software interfaces are maintained, whereas its bandwidth-limiting and parallel bus implementation is replaced by a highly scalable, fully serial interface. PCI Express technology takes advantage of recent advances in point-to-point interconnects, switch-based technology, and packetized protocol to deliver new levels of performance and features.

"Since its release in 2002, member companies have been developing products using the PCI Express architecture. Many of them are expected to hit the market this year," said Tony Pierce, PCI-SIG Chairman. "The PCI-SIG appreciates Lattice Semiconductor's support for its new PCI Express technology."

PCI Express IP Core "No-Risk" Evaluation
The PCI Express core is part of Lattice's rapidly growing ispLeverCORE^TM library. ispLeverCORE modules are designed using the highest coding standards, and are extensively tested to meet required functionality and performance standards. These cores are ready-to-use, well documented, and extensively supported by Lattice field and factory engineers.

Lattice provides free "no-risk" evaluations for its PCI Express IP core. The evaluation package can be downloaded at no charge from the Lattice Web site. Customers can use an evaluation model to perform functional simulation of the IP core. The ispLeverCORE evaluation netlist(s) can be instantiated into Verilog and/or VHDL top-level projects. After synthesizing the top-level design (with the core described only as a black box), the entire project is compiled into a Lattice database. Pack, Place, and Route processes can be run to check the fit of the design. Finally, static timing analysis can be run on the evaluation IP using the Performance Analyst™ tool.

After the ispLeverCORE based on PCI Express technology is licensed, the customer can continue the implementation and programming flow. The customer is then able to perform full timing simulation, and generate a bitstream file for programming a Lattice device. A license for the PCI Express IP Core is available from Lattice for a one-time price of $25,000.

ORT82G5 and ORT42G5 FPSCs
The Lattice ORT82G5 & ORT42G5 FPSC devices are high-performance programmable devices that combine optimized embedded core functions together with flexible, general-purpose FPGA logic. The ORT82G5 and ORT42G5 FPSCs offer 8 and 4 SERDES channels, respectively. In addition to the SERDES channels and over 10,000 ORCA® FPGA logic elements for general-purpose logic, both FPSCs include fully embedded 8b/10b encoding, XAUI and Fibre Channel link state machines and multi-channel alignment capabilities. The SERDES on the ORT82G5 and ORT42G5 include numerous best-in-class features:

• 3.7-0.6Gbps operating range per channel
• <225mW per channel worst case at 3.125Gbps
• Transmit jitter of 0.17UI at 3.125Gbps
• Receive jitter of 0.75UI at 3.125Gbps
• Drives 40 inches (1 meter) of FR-4 backplane at 3.125 Gbps
• Fast Locking Times with bit realignment in 300 nanoseconds (938 bit times @ 3.125 Gbit/sec)

The ORT82G5 features 372 programmable user I/Os and the ORT42G5 features 204 I/Os supporting a variety of advanced interface standards, including LVCMOS, LVTTL, LVDS, Bus-LVDS, LVPECL, HSTL, SSTL3/2, GTL, GTL+, ZBT and DDR to facilitate easy interfacing.

About PCI-SIG
Formed in 1992, PCI-SIG (originally formed as the Peripheral Component Interconnect Special Interest Group) is the industry organization chartered with the development and management of the PCI bus specification, the industry standard for a high-performance I/O interconnect to transfer data between a CPU and its peripherals. As part of that charter, the organization aims to do the following:

• Support new requirements
• Preserve backward compatibility for all PCI revisions
• Maintain the specification as an easy-to-implement, stable technology
• Contribute to the technical longevity of PCI
• Support the establishment of PCI as an industry-wide standard

The PCI-SIG currently has more than 800 member companies, and effectively places the ownership and management of the PCI specification in the hands of the developer community. By adding new features and functionality to the base PCI bus specification, the PCI-SIG is enabling it to adapt to evolving industry needs. For more information about PCI-SIG, visit http://www.pcisig.com

About Lattice Semiconductor
Lattice Semiconductor Corporation, the inventor of in-system programmable^TM (ISP^TM) logic products, designs, develops and markets the broadest range of Field Programmable Gate Arrays (FPGAs), Field Programmable System Chips (FPSCs) and high-performance ISP programmable logic devices (PLDs). Lattice provides total solutions for today's system designs by delivering innovative programmable silicon products that embody leading-edge system expertise.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124-6421, USA; telephone 503-268-8000, fax 503-268-8037. For more information about Lattice Semiconductor Corporation, visit http://www.latticesemi.com

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our silicon wafer suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), in-system programmable, ISP, ispLEVER, ispLeverCORE, ORCA, Performance Analyst, sysHSI and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

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