Cascade and Denali Announce Customer Success for PCI Express Solutions

INTEL DEVELOPERS FORUM, SAN FRANCISCO, Calif., February 17, 2004 – Denali Software, Inc., the leading provider of electronic design automation (EDA) products for chip interface design and verification, and Cascade Semiconductor Solutions, Inc., a leading provider of intellectual property (IP) solutions for the PCI Express market, today announced the results of a collaborative effort to deliver customer success for numerous PCI Express system designs. Customers using Cascade design IP and Denali verification IP benefited from a clean integration between the best-in-class solutions, and a joint effort to ensure compliance with the PCI Express specification, and interoperability with other PCI Express systems. The effort ultimately resulted in a successful and high-quality implementation of the PCI Express interface in the customer chip designs.

"Denali has clearly emerged as the market leader in verification IP for complex chip interfaces such as PCI Express," said Jing-fan Zhang, Chief Executive officer at Cascade Semiconductor Solutions Inc, "We have a significant amount of experience in delivering IP for PCI Express designs, and we know that high-quality verification IP is critical to ensuring customer success. Denali has the additional advantage of portability; we can be assured that their verification IP will perform equally well in whatever verification environment the customer is using. Removing the integration barrier was a key issue in addressing the diverse design and verification environments of our joint customers."

"Cascade is rapidly establishing themselves as a leader in the design IP market segment for PCI Express systems," said David Lin, Vice President of Product Marketing at Denali. "Early on, our relationship with Cascade was focused on ensuring that our mutual customers were enabled with a clean integration between the Denali verification IP, and the design IP from Cascade. We have since leveraged our experience with several mutual customers, and we now have what is arguably the most proven and successful flow for developing and verifying PCI Express designs."

About Cascade Semiconductor Solutions, Inc.
The CX-PL CascadeXpress™ Port Logic Core IP is based on Cascade's scalable PCI Express IP Core architecture. This core provides a complete PCI Express port implementation including the Transaction Layer, Data Link Layer and Physical Layer implementations. The CX-PL may be configured to address lane configurations from x1 up to x16 2.5Gbps lanes based on application requirements; including applications ranging from power and area sensitive Mobile/NEWCARD implementations up to high performance, low latency solutions such as graphics and system IO/communications. The CX-PL architecture allows for quick integration into the end-user's SOC. Support modules are provided with the core to ease this integration and allow for an optimal partitioning for application specific customization requirements without impacting the PCI Express compliant implementation of the Port Logic. These include support for application logic interfacing, configuration space support, and SerDes integration from multiple PCI Express SerDes core providers. The CX-PL architecture is positioned to address both FPGA and ASIC applications.

About Denali PureSpec Verification IP
PureSpec is a verification IP product used by chip designers to simulate, and verify PCI Express design interfaces. PureSpec models all devices in the PCI Express topology, including the root complex, switch, endpoint, and PCI Express to PCI bridge. Within PureSpec, all protocol layers (physical, data link, transaction) of the PCI Express specification are completely modeled and can be simulated concurrently or independently. The product contains thousands of assertions that are monitored during simulation to ensure compliance with the PCI Express specification, and interoperability with other PCI Express devices. The PureSpec product is built on the proven product architecture of Denali's MMAV product, which has been used to verify complex memory interfaces for thousands of successful designs, and provides seamless integrations to all popular EDA tools and verification languages. Proven product platform, dedicated customer support, and unmatched EDA modeling and verification expertise make PureSpec the best-in-class verification IP solution for PCI Express designs. The PureSpec product is available now for customer evaluation at: www.denali.com/purespec

About Cascade Semiconductor Solutions, Inc.
Cascade Semiconductor Solutions, Inc. is a Beaverton, Oregon based privately held company developing IP cores and highly integrated SOC-IP products for the PCI Express market. Launched by a group of experienced industry veterans, Cascade has quickly moved into a leadership position in the PCI Express IP space with our scalable, multi-lane capable PCI Express Port Logic IP (CX-PL). For more information, please visit our website www.cascadeip.com

About Denali
Denali Software Inc. is the world's leading provider of electronic design automation (EDA) tools and semiconductor intellectual property (SIP) solutions for chip interface design and verification. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, please visit Denali at www.denali.com or contact Denali directly at: 650-461-7200

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