Xilinx Unveils End to End Programmable Solutions for the Entire Line Card to the Backplane

Xilinx introduces AdvancedTCA development platform, next generation crossbar II, mesh fabric reference design at Intel Developer Forum

Xilinx is demonstrating the AdvancedTCA development platform for the first time today at the Intel Developer Forum in San Francisco, California (Intel Pavilion Booth # 42 and Intel Communications Alliance Booth #509). The platform, together with the Intel® IXDP2401 advanced development platform, features the Intel® IXP2400 network processor and Xilinx Virtex-II Pro FPGAs with embedded PowerPC processors and high speed-serial RocketIO™ technology.

"AdvancedTCA was defined to support a scalable backplane environment that will address a wide spectrum of standard and proprietary fabric interfaces," said Joe Pavlat, president and chairman of the PCI Industrial Computer Manufacturers Group (PICMG). "What Xilinx has delivered today will accelerate a broad range of applications by allowing designers to take full advantage of protocol-agnostic, off-the-shelf solutions based on the AdvancedTCA standard, and with a level of flexibility that has never before been achieved."

ATCA Development Platform
The full mesh ATCA development platform accelerates development and deployment of a broad-range of markets and applications. It uses a standard footprint that leverages existing infrastructure to gain added flexibility while ensuring interoperability through compliance with the PICMG standard. The development platform offers a 15 channel, one port full mesh fabric interface, supports port rates to 3.125 Gbps and includes an area for customers to develop application-specific personality modules. It utilizes a Virtex-II Pro FPGA based fabric interface that includes all PICMG 3.0 defined card and shelf management functionality. Management firmware executes on one of the Virtex-II Pro's PowerPC processors running an embedded Linux operating system. The ATCA Development Board is available through Avnet.
"With an estimated market size of $3.7B in 2007 for AdvancedTCA platforms, even in the traditionally proprietary telecom sector, it is clear that open standards-based building blocks are of interest for a wide variety of system implementations because they represent an improved business model," said Karen Liu, managing director, Telecom Advisory Services at RHK, Inc. "A development-to-early production platform such as that announced today by Xilinx, represents a potentially large win-win for system companies and vendors in terms of lower development and support costs, product differentiation and economies of scale across multiple products."

Mesh Fabric Reference Design
The mesh fabric reference design from Xilinx is a fully functional reference design that enables cost-optimized and highly flexible serial mesh backplanes with Mesh Technology on Xilinx (MTX) Solutions. MTX has been targeted for Virtex-II Pro FPGAs with all the baseline functions required for a mesh backplane fabric interface, including ingress and egress datapath blocks, serial link interface blocks utilizing RocketIO MGTs, and a management interface block for control plane access to internal control and status registers. All documentation and design files are available free of charge and can be easily accessed at www.xilinx.com/esp.

Crossbar Switch Solution
The second generation programmable crossbar switch solution for the Virtex-II and Virtex-II Pro family of FPGAs utilizes a Clos-based architecture to further improve area and performance. The solution produces an area savings of nearly 4X, enables up to 2048 I/Os, and improves performance up to 275 Mbs per channel in V-II Pro devices. I/O interfaces include 3.125 Gbps and 10 Gbps RocketIOs. The second-generation crossbar switch employs on-chip partial reconfiguration technology using embedded PowerPC or MicroBlaze processors to implement crossbar connections. Digital crossconnects, add-drop multiplexers, video, broadcast and ATM switches are example applications that benefit from programmable, parameterized designs with crossbar switch functions. The reference design includes documentation and demonstration files which are available free of charge and can be easily accessed at www.xilinx.com/esp upon registering at the Xilinx website.

Xilinx Line Card and Backplane Design Online Resource
Xilinx eSP (www.xilinx.com/esp) is a proven resource for engineers, dedicated to accelerating the development of products across a wide-range of markets and applications, including end-to-end programmable solutions across the line card and backplane. The site is a comprehensive resource, delivering a powerful array of solutions and information in a single location.

About Serial Tsunami and Xilinx Solutions for High-speed Serial Backplanes
The Xilinx Serial Tsunami initiative was introduced to help accelerate the industry shift from parallel to serial I/O signaling technologies by delivering next generation connectivity solutions which support line rates from 622 Mbps to 10 Gbps and beyond. Xilinx's high performance Virtex-II Pro family of FPGAs deliver industry leading features, including IBM PowerPC™ processors immersed into the industry's leading FPGA fabric, muti-gigabit RocketIO™ serial transceivers, and cutting-edge embedded design tools, combined with a suite of IP cores – representing a comprehensive solution for a broad range of connectivity requirements across the entire line to the backplane.

About Xilinx
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.

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