400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Philips Business Silicon Hive wins Microprocessor Report Analysts' Choice Awards
“Silicon Hive’s Avispa+ was by far the most audacious of these CPU and DSP cores” and “incorporates nearly every major processor-design philosophy from the past few decades, from VLIW to RISC and SIMD to CISC” writes Jim Turley in the February 9, 2004 post award ceremony issue of Embedded Processor Watch, adding that the Avispa+ core “should far outrun anything the other vendors have produced.”
“While most of our competitors have been busy adding complex and power-hungry hardware, such as deeper pipelines, larger caches and branch prediction logic to their processors in the hope of increasing performance, we have co-designed the Avispa+ architecture and compiler to achieve higher performance and lower power consumption coupled with a remarkably small silicon footprint,” said Jeroen Leijten, Chief Processor Architect and Co-founder of Silicon Hive. “This award from the world’s leading analyst group in the microprocessor business shows that we have a winning combination of the most parallel embedded VLIW processor and the most aggressive optimizing C-compiler known to date.”
The Avispa+ core embodies all three of Silicon Hive’s key objectives – providing a combination of high performance and low power consumption in highly cost-effective areas of silicon. Even at a power-saving clock frequency of just 150 MHz, Avispa+ gives a peak performance of 9 GOPS (Giga Operations Per Second). Avispa+ can issue 60 new operations every cycle, encoded in a 768-bit ultra-long instruction word (ULIW). Power consumption at this clock frequency is a mere 150 mW and the core only occupies 4 mm2 of silicon when implemented in 0.13-micron CMOS process technology.
The Avispa+ core is principally targeted for orthogonal frequency-division multiplexing (OFDM) based radio applications. In addition to the Avispa family of cores, Silicon Hive is also developing the Moustique and Bresca families of cores. All three families are targeted at software-defined radio and image/video processing applications in mobile communication, consumer and automotive market segments.
The winning of this latest Microprocessor Report Analysts’ Choice award further cements Silicon Hive’s position as a recognized leader in embedded processor technology.
More information on Silicon Hive can be found at http://www.siliconhive.com
About Royal Philips Electronics
Royal Philips Electronics of the Netherlands is one of the world's biggest electronics companies and Europe's largest, with sales of EUR 29 billion in 2003. It is a global leader in color television sets, lighting, electric shavers, medical diagnostic imaging and patient monitoring, and one-chip TV products. Its 164,500 employees in more than 60 countries are active in the areas of lighting, consumer electronics, domestic appliances, semiconductors, and medical systems. Philips is quoted on the NYSE (symbol: PHG), Amsterdam and other stock exchanges. News from Philips is located at www.philips.com/newscenter
AVISPA, MOUSTIQUE, and BRESCA are trademarks of Koninklijke Philips Electronics N.V.
|
Related News
- StarCore SC2400 Processor Core Wins "Best DSP Licensable Core" Analysts' Choice Award From Microprocessor Reports
- Arm Mali-G77 GPU named Best Processor IP in The Linley Group's Analysts' Choice Awards
- TSMC Wins All Apple's A10 Chip Business, Report Says
- Silicon Hive, a semiconductor IP supplier in the Philips Technology Incubator, Demonstrates World's First Fully Programmable Digital TV Demodulator IP Core
- Philips' Silicon Hive to develop IP cores
Breaking News
- GUC Joins Arm Total Design Ecosystem to Strengthen ASIC Design Services
- QuickLogic Announces $6.575 Million Contract Award for its Strategic Radiation Hardened Program
- Micon Global and Silvaco Announce New Partnership
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
Most Popular
- GUC Joins Arm Total Design Ecosystem to Strengthen ASIC Design Services
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- VeriSilicon unveils next-generation high-performance Vitality architecture GPU IP series
- SafeNet Reiterates Guidance and Clarifies Revenue Assumptions
- Micon Global and Silvaco Announce New Partnership
E-mail This Article | Printer-Friendly Page |