DSP core spins threads for speed at low power

DSP core spins threads for speed at low power
By Chris Edwards, EE Times UK
May 9, 2001 (12:50 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010508S0070

LONDON — Imagination Technologies Group plc has created a division to sell a core based on its multithreaded digital signal processor architecture.

The new division has been named Metagence Technologies. The first product to use its Meta core is a digital audio broadcasting (DAB) receiver chip being developed by Digital One, a British digital radio network, and Imagination.

The core has been in development for four years, and earlier forms have been used in some of Imagination's other chip designs, the company said.

"We haven't invented this overnight," said Hossein Yassaie, president and chief executive officer of Imagination (Kings Langley, England). "The reason for doing a multithreaded design is because of the devices that are coming. They will be mobile devices that need to do multiple functions in real-time. More devices will have to handle multimedia and baseband processing [at the same time] ," he said.

Yassaie said that multiprocessing would demand more on-chip resources and increase power consumption. Multithreading, in which the processor dynamically switches between program threads on a cycle-by-cycle basis, is more efficient, Yassaie said.

Intel Corp. has employed multithreading in the microcode engines of its IXP processors, and Sun Microsystems Inc. plans to use it in the Java-oriented Majc processor. Infineon Technologies AG has said multithreading is a possible evolution for the TriCore architecture.

The primary advantage of multithreading is that it can hide memory latency. In the case of the Intel IXP microengines, the processor core switches to another thread whenever the running thread needs to fetch data from memory. Because that thread has to wait for the data, the processor switches to any thread that has data ready to process. This fine-grained switching effectively removes much of the effect of memory latency on processing throughput.

"Latency is a very importan t issue when you do system-on-chip. You may have five different on-chip components. While one is accessing memory, the other four have to wait," said Yassaie.

Yassaie said the company has adopted a more-advanced approach to multithreading. Instead of switching on a pure round-robin basis, the core takes account of the priorities of threads that are ready to run, helping to meet real-time deadlines.

Two levels

"There are two levels of multithreading. At one level, the programmer has total control to define how things happen," said Yassaie. "But we have added a new technology, called AMA, automatic MIPS allocation. It lets you compartmentalize a thread in a virtual processor."

Under AMA, Yassaie said, threads have their own MIPS requirements that can be expressed to the core, together with their real-time constraints, such as deadlines. The application sets five or six parameters.

"Integration is very simple when you bring software under this control mechanism," said Yassaie. "It is a hardware engine. There is no software overhead for anything."

The processor calculates its current workload so that it can reject tasks that would overload it. When running, each thread has full access to all of the execution units in the core to improve support for time-critical broadband processing functions, said Yassaie.

"It can do things like an FFT [fast Fourier transform] in a couple of cycles. We are not just depending on multithreading for performance. We have a very strong architecture."

Metagence has designed Meta to scale in terms of execution units, such as multiply-accumulate engines, and there will be a level of configurability that licensees can use.

"Licensees can have special instructions. However, there needs to be some compatibility so we are a bit more rigid than some," said Yassaie.

"It's a formal architecture. We are not sticking a few ALUs [arithmetic logic units] here and there."

Metagence will sell the Meta cores using a standard license-fee-plus-roya lty model. Compilers, assemblers and linkers are being developed by the company's Ensigma division, but Imagination is also talking to third-party tools suppliers.

"We are talking to a number of semiconductor companies and system companies," said Yassaie.

The core will be made available in both soft and hard forms.

The Metagence division has 30 people, and Imagination is still recruiting for the division as well as for Imagination.

Chris Edwards is the editor of Electronics Times, EE Times' sister publication in the United Kingdom.