Synfora Delivers First True "Algorithm-to-Tapeout" Synthesis Product to Reduce Design Risk, Time to Market

PICO Express Allows Architectural Exploration,  Cuts RTL Creation Time From Months to Days and Enhances End-Products.

Mountain View, California — March 15, 2004 — Synfora, Inc. announces PICO Express, the first algorithm-to-tapeout synthesis tool that lets designers quickly explore and implement C algorithms in silicon. Its "Program In, Chip Out" (PICO) technology significantly reduces time to market and design risks by evaluating alternatives and creating efficient RTL code, resulting in optimal end-products. This technology is based on 50 engineering years of research at HP Labs and more than 15 engineering years of development at Synfora, and is developed for audio, video, imaging, wireless, and security applications.

PICO Express boosts designer productivity by enabling "what-if" analysis and by automatically creating efficient hardware from algorithmic C descriptions - thus reducing RTL creation time from months to days, It lowers verification cost by using previously verified blocks and correct-by-construction synthesis, and by automatically generating a test bench to the test the RTL. In addition, PICO Express lets designers find an optimal implementation efficiently and explore the algorithm for better alternatives.

"We are pleased and proud to have achieved this milestone," said Vinod Kathail, Synfora CTO, Founder, and original PICO Project team leader at Hewlett-Packard. "PICO Express is the result of years of research and development, and it will change the way SoC designs are implemented."

Efficient, Comprehensive Approach PICO Express algorithm-to-tapeout synthesis begins with a description of compute-intensive algorithms. It provides immediate feedback on whether the C code can be implemented efficiently in hardware. Designers can run "what-if" experiments with different performance goals - in minutes - to make the optimal selection. PICO Express leverages Synfora's customizable Pipeline of Processor Array architecture to generate efficient hardware. The architecture is highly flexible, allowing PICO Express to automatically tailor the hardware to the precise algorithm.

PICO Express creates highly optimized hardware accelerators directly from these compute-intensive C algorithms, and ensures they are compatible with RTL-to-GDSII flows. As a result, implementations are very competitive with hand design, without the time and cost penalties. Along with the RTL description, PICO Express provides a synthesis script, test bench and software driver code to enable integration of the RTL into SoC.

PICO Express includes extensive checking and verification capability: bit accurate C simulation detects overflows; a program verifier ensures the designer creates an algorithmic description that will result in efficient hardware; a thoroughly verified PPA architecture; an automatically generated test bench to validate that the RTL is functionally equivalent to the original algorithm; and perturbation testing to validate that structures added to enable parallelism but not described in the algorithm will not cause functional or timing failures.

Simon Napper, Synfora's CEO, stated, "Companies involved in complex design implementation are constantly seeking ways to get to market sooner and minimize their design risks. The breakthrough technology that makes this possible is available only in PICO Express. We are delighted that companies working on next generation applications can enjoy its productivity benefits."

Pricing and Availability PICO Express is available immediately and is priced at US $125K for a design project license. The first customer silicon using PICO Express is expected in March 2004.

About Synfora, Inc.
Founded in 2003, Synfora, Inc. is a privately held company that delivers the first true "algorithm-to-tapeout" synthesis technology, enabling designers to rapidly explore and implement C algorithms in silicon. Synfora's algorithmic synthesis technology - PICO (Program In Chip Out) - significantly reduces both time to market and design risks by exploring architecture alternatives and creating efficient RTL code. Further information about Synfora and PICO technology can be found at www.synfora.com.

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