NewLogic Technologies Names New Head of R&D
Axel Jahnke assigned as VP Research and Development
Lustenau, Austria; March 25th, 2004 - NewLogic Technologies, a leading supplier of wireless intellectual property (IP) cores and design services, named Axel Jahnke as Vice President in charge of Research and Development, effective March 2004.
Axel Jahnke joined NewLogic in January 2003 for heading the design center in Munich, Germany. In his new position he will be responsible for developing and leading the activities of all the company's research and development centers and engineering staff.

NewLogic employs more than 180 highly qualified digital, analog and RF engineers based in Lustenau (Austria), Sophia-Antipolis (France), Munich (Germany) and in the recently opened Design Center in Geneva (Switzerland). The company has also subsidiaries in San Jose/US and Singapore.
Axel Jahnke's background includes more than 11 years executive R&D experience in the global semiconductor industry. Before joining NewLogic Axel held R&D management positions at Infineon Technologies and Multilink Technology. He holds a masters degree in Electrical Engineering from the Technical University of Berlin, Germany."Axel's management experience provides significant leadership for our engineering team securing the timely execution of our customer design service projects and our internal IP development", Hans-Peter Metzler, President and CEO, commented."Especially for our WLAN system IP, he will ensure that the company maintains and further expands its technological leadership".
About NewLogic Technologies
NewLogic Technologies, headquartered in Lustenau, Austria, is a leading global supplier of IEEE 802.11 Wireless LAN and Bluetooth intellectual property (IP) cores and next generation cellular technology. In addition NewLogic offers IC design and IP Integration to help its customers achieve their aggressive time to market goals.
|
Related News
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |