MOSAID Develops High-Speed Embedded DRAM Macrocell with Lead Customer
OTTAWA, Ontario, Canada - April 22, 2004 – MOSAID Technologies Incorporated (TSX:MSD) today announced the signing of a multi-million dollar agreement with a major semiconductor company to provide a high-speed embedded DRAM (dynamic random access memory) macrocell for use within the lead customer's embedded processor products.
"The signing of this lead customer for our embedded DRAM macrocell is a major achievement for MOSAID's design licensing program," said George Cwynar, President and Chief Executive Officer of MOSAID. "The macrocell will also be added to MOSAID's portfolio of IP products available for license to other customers."
"Our customer's embedded processor technology will benefit from a unique combination of high speed, low power consumption and reduced die area achieved through the use of our proprietary architecture, circuit techniques and BIST methods," said Peter Gillingham, Vice President and General Manager of the MOSAID Intellectual Property Division. "We have a long-standing reputation as a centre of excellence in high performance embedded DRAM design, and have the experience and inventiveness to address our customers' demanding requirements, whether through custom chip solutions or specialized IP blocks."
About MOSAID
MOSAID Technologies Incorporated is an independent semiconductor company operating through two divisions:
- Intellectual Property - adeveloper and licensor of memory intellectual property.
- Systems - the leading supplier of engineering memory test and analysis systems to memory manufacturers, foundries and fabless chip companies around the world.
Founded in 1975, MOSAID is based in Ottawa, Ontario, Canada, with offices in Santa Clara, California; Newcastle upon Tyne, U.K; and Tokyo, Japan. For more information, visit the Company’s web site at www.mosaid.com.
Forward Looking Information
This document may contain forward-looking statements relating to the Company’s operations or to the environment in which the Company operates. Such statements are based on current expectations that are subject to a variety of risks and uncertainties that are difficult to predict and/or beyond MOSAID’s control. Actual results may differ materially from those expressed in any forward-looking statements, due to factors such as customer demand and timing of purchasing decisions, product and business mix, competitive products, pricing pressures as well as general economic and industry conditions. MOSAID assumes no obligation to update these forward-looking statements, or to update the reasons why actual results could differ from those reflected in any forward-looking statements. Additional information identifying risks and uncertainties is contained in other public filings with the Ontario Securities Commission.
|
Related News
- Mentor Graphics Introduces its High-Speed USB-Certified PHY for Embedded Host Applications in the SMIC 0.13 micron Process
- Toshiba Develops New 8-Bit Core With High-Speed Processing And Large-Capacity Address Space For Next-Generation Microcontrollers
- Renesas Technology Develops 1GHz Synthesizable DSP Core that Uses a Technique for High-Speed Operation
- Renesas Technology Develops Automated Device Sizing System for High-Speed Digital/Analog Converters for SoC Use
- Altera Introduces Stratix II Development Kits for High-Speed, DSP, and Embedded System Designs
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |