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TriCN Announces Product Support For Chartered Semiconductor
TriCN Base I/O Library Enables High-Speed Interface Development for Chartered Customers
SAN FRANCISCO, CA - April 26, 2004 - TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its Base I/O library in the 130 nanometer (nm) process for Chartered Semiconductor. Broadly applicable to a wide variety of interface application requirements, TriCN's Base I/O library is a comprehensive set of cells containing all elements necessary for pad ring assembly.
TriCN's Base I/O library is particularly well suited to the demands of high-performance interface applications. The cells are designed to accommodate more robust power and ground demands, allowing for an effective area gain compared to competing libraries. All cells feature built-in noise isolation to provide improved operation and reliability in high-performance applications. Additionally, the library is designed to support not only bond-wire, but also flip-chip packaging typically found in high-speed ICs.
"We are pleased to offer support for Chartered Semiconductor customers in the TriCN product portfolio," said Joseph Curry, CEO of TriCN. "As one of the world's top three semiconductor foundries, Chartered has a large and diverse group of customers who can now take advantage of TriCN's high-performance interface technology to achieve their frequency targets. High-speed interface design is an increasingly complex prospect for semiconductor companies. We are eager to work with both Chartered and their customers to meet these challenges."
TriCN's library is well differentiated from competing products on the basis of the variety of cells offered, as well as the performance and flexibility of those cells. Along with the standard array of Corners, Breakers, Power and Ground, and LVTTL/LVCMOS cells, TriCN's Base I/O Library includes higher performance HSTL, SSTL-2, PCI 2.2, PCI-X 1.0, and USB 1.1, cells currently lacking in most competitive offerings.
Availability
TriCN's Base I/O library is immediately available for flip-chip and bond-wire applications in the Chartered 130nm process.
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip. All products are designed using rigorous signal integrity and timing analysis to ensure first time power-up success. Products include Base I/O libraries for pad-ring creation, high-performance memory and networking interfaces, multi-function I/O's compatible with multiple interface protocols, and multi-gigabit SerDes products. TriCN's customers range from fabless semiconductor to systems companies and independent design manufacturers.
SAN FRANCISCO, CA - April 26, 2004 - TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its Base I/O library in the 130 nanometer (nm) process for Chartered Semiconductor. Broadly applicable to a wide variety of interface application requirements, TriCN's Base I/O library is a comprehensive set of cells containing all elements necessary for pad ring assembly.
TriCN's Base I/O library is particularly well suited to the demands of high-performance interface applications. The cells are designed to accommodate more robust power and ground demands, allowing for an effective area gain compared to competing libraries. All cells feature built-in noise isolation to provide improved operation and reliability in high-performance applications. Additionally, the library is designed to support not only bond-wire, but also flip-chip packaging typically found in high-speed ICs.
"We are pleased to offer support for Chartered Semiconductor customers in the TriCN product portfolio," said Joseph Curry, CEO of TriCN. "As one of the world's top three semiconductor foundries, Chartered has a large and diverse group of customers who can now take advantage of TriCN's high-performance interface technology to achieve their frequency targets. High-speed interface design is an increasingly complex prospect for semiconductor companies. We are eager to work with both Chartered and their customers to meet these challenges."
TriCN's library is well differentiated from competing products on the basis of the variety of cells offered, as well as the performance and flexibility of those cells. Along with the standard array of Corners, Breakers, Power and Ground, and LVTTL/LVCMOS cells, TriCN's Base I/O Library includes higher performance HSTL, SSTL-2, PCI 2.2, PCI-X 1.0, and USB 1.1, cells currently lacking in most competitive offerings.
Availability
TriCN's Base I/O library is immediately available for flip-chip and bond-wire applications in the Chartered 130nm process.
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip. All products are designed using rigorous signal integrity and timing analysis to ensure first time power-up success. Products include Base I/O libraries for pad-ring creation, high-performance memory and networking interfaces, multi-function I/O's compatible with multiple interface protocols, and multi-gigabit SerDes products. TriCN's customers range from fabless semiconductor to systems companies and independent design manufacturers.
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