Toshiba Will Apply Sarnoff's TakeCharge IC Design Approach To Chip Processes Down To 65 Nanometer
New Agreement Extends Toshiba/Sarnoff Strategic Cooperation; TakeCharge Solutions Already Proven In Toshiba Processes As Small As 90nm
Princeton, New Jersey and Tokyo (May 13, 2004) -- Sarnoff Corporation (www.sarnoff.com) and Toshiba Corporation of Tokyo, Japan (www.toshiba.com) today announced that Toshiba will implement the TakeCharge® on-chip electrostatic discharge (ESD) design approach from Sarnoff in its CMOS integrated circuit processes (0.18um, 0.13um, 90nm and 65nm process technology).
As part of the agreement, Sarnoff will also collaborate with Toshiba in order to develop customized solutions for future generations of Toshiba ICs in geometries as small as 45nm and 32nm.
“TakeCharge technology helps us reduce the die size of our chips for greater economy, while maintaining and ensuring ESD protection in all application areas including high speed,” said Shigeo Koguchi, President and CEO of Toshiba’s Semiconductor Company.
The new strategic agreement between Toshiba and Sarnoff extends a relationship that began in 2000. TakeCharge technology has already been silicon-proven in Toshiba’s CMOS products with advanced process technologies of 0.18um, 0.13um, and 90nm, and is currently being verified in 65nm.
“We’ve had consistent success in designing more compact, higher-performance ESD protection into our ICs with TakeCharge,” said Naoyuki Shigyo, Chief Specialist, System LSI Design Department, Toshiba’s Semiconductor Company. “We will continue to collaborate with Sarnoff to develop solutions for our future processes such as 45nm and 32nm.”
TakeCharge has been used successfully in high-volume 0.18um CMOS and 0.13um CMOS ICs starting in 2002, and is currently being implemented in the first 90nm CMOS products.
“We are proud to be working with Toshiba’s Semiconductor Company, one of the world’s premier sources of IC innovations,” said Koen Verhaege, Director of ESD Design Solutions & Executive Director of Sarnoff Europe. “The effectiveness of TakeCharge has been demonstrated at leading foundries in Japan and around the world. But this agreement with an industry leader based on extensive experience with the technology is especially gratifying.”
In addition to significant die size reductions, TakeCharge technology ensures “first time right” ESD design, according to Verhaege. With more dies on a wafer and less time spent in (re)design, the technology has the potential to save millions of dollars in product development and production costs. It also helps eliminate the cost of additional mask sets.
About Toshiba
Toshiba Corporation is a leader in the development and manufacture of electronic devices and components, information and communication systems, consumer products and power systems. The company’s ability to integrate wide-ranging capabilities, from hardware to software and wide-ranging services, assure its position as an innovator in diverse fields and many businesses. In semiconductors, Toshiba continues to promote its leadership in the fast growing system-on-chip market and to build on its world-class position in NAND flash memories, analog devices and discrete devices. Toshiba has approximately 164,000 employees worldwide and annual sales of over US $47 billion. Visit Toshiba’s web site at www.toshiba.co.jp/index.htm.
About Sarnoff
Sarnoff Corporation (www.sarnoff.com) produces innovations in electronic, biomedical and information technology that generate successful new products and services for clients worldwide. Founded in 1942 as RCA Laboratories, it develops breakthroughs in ICs, lasers, and imagers; drug discovery, manufacture and delivery; digital TV and video for security, surveillance, and entertainment; high-performance networking; and wireless communications. Its history includes the development of color TV, the liquid-crystal display, and the disposable hearing aid, and a leadership role in creating the new U.S. digital and HDTV standard. Sarnoff also founds new companies to bring its technologies to market. It is a subsidiary of SRI International.
About Sarnoff Europe
Sarnoff Europe (www.sarnoffeurope.com) located in Gistel, Belgium, is a subsidiary company of Sarnoff Corporation. Sarnoff Europe assumes worldwide responsibility for the development and commercialization of the TakeCharge® on-chip ESD protection IP portfolio.
|
Related News
- Synopsys' IC Compiler II Enables Toshiba's Tapeout of Complex 40-nm SoC, Proves out Game-Changing Capabilities
- IC Knowledge's Cost Modeling of Semiconductor Manufacturing Shows Fully Depleted Silicon-on-Insulator Technology to be the Most Cost-effective Approach at the 22nm Node
- RF Engines' Wideband Digital Down Converter efficiently processes 1 GHz bandwidth
- Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65 Nanometer LL Process Technology
- eMemory's Neobit OTP reaches 1 million wafer production mark; IP solutions for 65 nm processes launched
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |