Altera rolls next-gen Nios processor

This week, the company is taking the wraps off its second-generation embedded processor for FPGAs, a successor to its popular Nios processor. With Nios 2, Altera hopes to entice more designers to choose its FPGAs by offering a flexible general-purpose RISC machine at a much lower licensing fee than that charged by CPU companies like ARM and MIPS Technologies. Altera said it will provide its FPGA customers a royalty-free, unrestricted license to use the Nios 2 core for $495; a second package that includes a development board and software tools is being offered for $995.

Altera said it plans to disclose the technical details of Nios 2 this week here at the Embedded Processor Forum.

As it rolls out Nios 2, Altera said it is trying harder to woo software developers who have largely been out of reach until now. As more processing power is integrated onto a single chip, software developers are gaining more influence in choosing hardware development platforms for OEMs, Altera officials said.

"The first-generation [Nios] was used very sparingly by the software guys," said Jordan Plofsky, senior vice president of Altera's applications business group. Even so, some 13,000 customers have licensed Nios since it was introduced three years ago, or about 10,000 more than Altera expected to have by this time.

With Nios 2, software developers will have a richer mix of tools, OSes and performance options at their disposal. "Once [software code] is in C, we can take care of it the rest of the way," Plofsky said.

For the past several years, Altera and rival Xilinx Inc. have been working to incorporate more hardware features onto their devices along with programmable logic gates, including processors, digital signal processing capabilities and serial transceivers. Both companies offer hard processor cores licensed from third-party vendors — IBM's PowerPC, in the case of Xilinx — and have separate soft processor development programs.

The introduction of Nios 2, however, marks a shift in Altera's processor plans. It now says it won't come out with a successor to its Excalibur line, which includes a hardwired ARM processor core. Excalibur is based on the company's older Apex FPGA architecture.

The company said it prefers the flexibility of soft processor cores, which can handle more tasks at various points in the FPGA fabric. "We learned that putting in a hard core is tricky," Plofsky said.

Nios 2 is a general-purpose 32-bit RISC processor core that runs on a new instruction set architecture, giving it enough horsepower to function as a control processor in the company's FPGAs. By contrast, the first Nios used a 16-bit instruction format, which was used mainly by hardware engineers as an I/O processor.

Altera is offering three versions of the Nios 2 core, the largest of which can achieve 220-Dhrystone Mips performance. That's about the same performance as a 0.18-micron ARM9 core, said Bob Garrett, marketing manager for Nios. The performance numbers are based on 90-nm simulation models.

Like its predecessor, Nios 2 lets developers create their own instructions, up to 256 of them for the latest architecture. The number of clock cycles needed to run a cyclic redundancy count algorithm using this method can be a fraction of a percent of what it would take to run in software only, the company said.

As part of its appeal to software developers, the company has beefed up its tool and OS lines. Nucleus Plus, MicroC, KROS, NORTi, PrKernal and micro-cLinux OSes have been ported to Nios 2. Also, four kinds of debuggers are supported.

Altera said there are no restrictions on how users employ Nios 2 in their designs, though the processor must be used on an Altera device. ASIC licenses are available for an extra charge, the company said.

As a product, Nios 2 isn't expected to make a big difference to the company's bottom line.

"If we were an IP company, there's no way we could make money on a $995 processor," Garrett said.