Synplicity and NEC Electronics Ink Physical Synthesis OEM Agreement for ISSP Structured ASICS
NEC Electronics Integrates Amplify-ISSP Software into its OpenCAD Design Environment for Use in ISSP Structured ASIC Designs
SUNNYVALE, Calif. and KAWASAKI, Japan, — 24 May 2004 -- NEC Electronics Corp. (TSE: 6723), a world-leading semiconductor solutions provider, and its global affiliates, and Synplicity, Inc. (Nasdaq: SYNP), a leading supplier of software for the design and verification of semiconductors, today announced the companies have entered into a worldwide OEM agreement whereby NEC Electronics will bundle and distribute a license for Synplicity’s Amplify® ISSP Physical Optimizer™ software within NEC Electronics’ OpenCAD® design environment for use in the development of its Instant Silicon Solution Platform™ (ISSP™) structured ASICs. The Amplify ISSP physical synthesis software is the result of nearly two years of joint development between the two companies to provide their mutual customers with a unique physical synthesis solution customized for NEC Electronics’ ISSP-1 (150nm) and ISSP-90 (90nm) structured ASICs.
Under the terms of the agreement, NEC Electronics will provide the Amplify ISSP software to all of its ISSP customers as the preferred complete physical synthesis design solution. Over the next 12 months, NEC Electronics will bundle the Amplify ISSP software as part of its OpenCAD tool suite. NEC Electronics and Synplicity believe this agreement will enable their mutual customers to achieve better quality of results and faster timing closure for their ISSP devices. Additionally, the Amplify ISSP software will streamline the design flow, and enable rapid layout times with predictable timing closure.
“We recommend ISSP customers use our OpenCAD design environment to achieve best-in-class quality of results and faster timing closure,” said Dr. Hitoshi Yoshizawa, Partner Program Executive, 1st System Operations Unit, NEC Electronics Corporation. “A significant reason for the success of our OpenCAD tool suite is due to the seamless interaction between best-of-breed third-party tools and NEC Electronics’ powerful proprietary software tools. The integration of the Amplify ISSP software has enabled us to deliver to our customers a complete physical synthesis design solution that is all-inclusive within their NRE costs, enabling them to meet their most stringent ISSP performance goals. We are pleased to partner with Synplicity as we see an increasing number of ISSP design starts.”
The design implementation environment for ISSP devices, NEC Electronics’ OpenCAD tool suite provides customers with access to the design tools needed to easily and efficiently complete their ISSP design (RTL to placed-gates) for handoff to an NEC Electronics authorized design center for backend detailed routing. The integration of the Amplify ISSP software within the OpenCAD design environment provides customers with a highly productive physical synthesis solution that delivers optimal results, enabling a “one-pass” design handoff flow for NEC Electronics’ ISSP customers.
“For nearly two years, we have been in joint development with NEC Electronics to develop custom synthesis and physical synthesis software to support its cost-effective, high-performance, fast turn-around ISSP structured ASIC devices,” said Bernard Aronson, president and CEO, Synplicity, Inc. “We believe NEC Electronics’ OpenCAD tool suite provides ISSP designers an ideal design environment to meet their design requirements and we believe the addition of the Amplify ISSP software to the OpenCAD tool suite will enable customers to rapidly achieve highly optimized designs at significantly lower costs. We are pleased NEC Electronics selected the Amplify ISSP software as the synthesis tool to bundle within its OpenCAD design environment and look forward to continuing our commitment to deliver best-in-class synthesis tools for our mutual customers.”
NEC Electronics America and Synplicity are holding a series of instructional seminars, “Discover ISSP Structured ASICs: Your Turn-Around Time Advantage from 150-90nm” during May. These seminars will provide engineers with a detailed, hands-on opportunity to learn about the advantages of ISSP structured ASICs and Amplify ISSP software. Upcoming seminars include Seattle, Wash. (5/25), Portland, Ore. (5/26), and Mountain View, Calif. (5/27). For additional information and registration, visit www.necelam.com/isspseminar or www.synplicity.com/isspseminar.
Availability
Beginning in May 2004, ISSP-1 customers will receive a six-month license of the Amplify ISSP software upon signing an ISSP development contract with NEC Electronics. Beginning in August 2004, ISSP-90 customers will receive a six-month license of the Amplify ISSP software as part of the OpenCAD design environment upon signing an ISSP development contract with NEC Electronics. Additional Amplify ISSP software licenses are available directly from Synplicity. For more information about the OpenCAD tool suite, contact NEC Electronics at http://www.necel.com. For more information about the Amplify ISSP software, contact Synplicity at http://www.synplicity.com. Availability is subject to change.
About Synplicity’s Amplify ISSP Software
The Amplify ISSP Physical Optimizer software carries forward into physical synthesis the joint R&D efforts between NEC Electronics and Synplicity that began in June of 2002. The software performs automatic memory block placement, concurrent full-chip (top-down) legalized placement and customized physical synthesis, timing analysis, and ISSP-specific datapath and arithmetic operator generation. The software is capable of handling any size of design for ISSP flat, without having to partition the design for synthesis, leading to substantially improved area and run time. The tight correlation to NEC Electronics’ place-and-route environment provides a one-pass flow for users of the Amplify ISSP software.
About NEC Electronics’ ISSP Structured ASICs
The ISSP architecture was designed to serve the growing number of applications that require higher complexity and performance than an FPGA but cannot bear the high development costs associated with cell-based ASICs. Each NEC Electronics’ ISSP design begins with a prefabricated master made up of an array of complex multi-gates, embedded IP cores, built-in test circuits, clock domains and power lines. The upper metal layers are easily and quickly placed, routed and fabricated to satisfy the unique requirements of each individual design. ISSP-based products consume much less power than a comparable FPGA and also have lower NRE costs than cell-based ASIC devices.
About NEC Electronics Corporation
NEC Electronics (TSE: 6723) worldwide specializes in semiconductor products encompassing advanced technology solutions for the high-end computing and broadband networking markets, system solutions for the mobile handsets, PC peripherals, automotive and digital consumer markets, and platform solutions for a wide range of customer applications. NEC Electronics Corporation has 25 subsidiaries worldwide including NEC Electronics America, Inc. (www.necelam.com) and NEC Electronics (Europe) GmbH (www.ee.nec.de). In addition to marketing, selling and supporting NEC Electronics products to customers in their respective regions, NEC Electronics America and NEC Electronics Europe also operate local manufacturing facilities in Roseville, California, and Ballivor, Ireland, respectively. Additionally, NEC Electronics America for North America and NEC Electronics Europe for Europe are the sales and marketing channels of NEC AM-LCD and PDP modules. For additional information about NEC Electronics worldwide, visit www.necel.com.
|
Related News
- Fujitsu and Synplicity Launch Amplify AccelArray Pro Software; Qualified and Recommended Physical Synthesis Software for Fujitsu AccelArray Structured ASICs
- NEC Electronics and Synplicity Expand Structured ASIC Agreement
- Synplicity Delivers Pro Version of its Amplify ISSP Software to NEC Electronics' Customers
- NEC Electronics Provides ISSP Structured ASIC Customers
- NEC Electronics Introduces the CMOS-12M Series of Mainstream Structured ASICs
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |