eASIC Raises $5 Million in Third Round of Funding from Kleiner Perkins Caufield & Byers
Vinod Khosla, KPCB Partner is Joining eASIC Board of Directors
San Jose, California, May 28, 2004 -- eASIC® Corporation, a provider of breakthrough Structured ASIC technology and products, today announced that it has secured $5million in equity financing from Kleiner Perkins Caufield & Byers, in a third round of funding. The previous funding rounds involved angel investors and semiconductor industry veterans. Vinod Khosla, who was named the Silicon Valley's most successful venture capitalist, is joining eASIC Board of Directors.
The new funds will be used to complete the Structured ASIC product family and tools set that are being jointly developed with Flextronics Semiconductor and Magma Design Automation. These products are based on eASIC’s innovative Structured ASIC technology that has been validated by ST Microelectronics and proven in silicon for its high performance and density. The first product member has been taped-out and the full family is scheduled for production release at 0.13 micron process technology in early 2005. In addition, the funding will be used for enhancing sales and marketing, promoting the Structured eASIC product in the US and Japan.
“KP is always looking for companies who are strongly positioned to change their respective industry,” said Vinod Khosla, Partner at Kleiner Perkins Caufield & Byers. “We were intrigued by eASIC’s innovative approach to customizing electronic designs in today’s challenging nanotechnology environment. While going through comprehensive due diligence, we recognized eASIC’s solid patent portfolio and the viability of its technology, along with the critical industry need for such a solution. eASIC has developed a unique ASIC technology that replaces the disadvantageous programmable interconnect of FPGA’s with customized interconnect that provides density and performance close to standard cell, while only using a single custom via layer. Moreover, since via customization is a perfect fit for direct-write eBeam, it allows eASIC to offer maskless lithography and NRE-free ASICs. We are confident that eASIC, with its breakthrough Structured ASIC technology has the potential of becoming a major player in the semiconductor ASIC market.”
“We are extremely pleased to receive our first VC funding from the leading VC firm and to have Vinod Khosla, the most respected venture capitalist, join our board,” said Zvi Or-Bach, eASIC President and CEO. “As a new start-up, joining KP’s portfolio companies, we are honored and challenged by the track record of their previous investments in companies such as Sun, AOL, Netscape, Amazon, Juniper, Genentech and Google.”
About eASIC
eASIC® has developed a breakthrough Structured ASIC technology aimed at dramatically reducing the overall fabrication cost and time of customized high-performance semiconductor chips. eASIC’s technology enables rapid and low-cost ASIC and System-on-Chip designs by its innovative use of proven programmable logic fabric in conjunction with single-via customizable segmented routing. As single-via generates ten times higher throughput of Direct-write e-Beam customization, it enables eASIC to offer NRE-free Structured ASIC. The Structured eASIC technology was successfully proven in silicon and validated by world-class semiconductor vendors. Partnering with industry leaders to jointly develop, manufacture and market Structured ASIC products, the company is positioned to become the preferred Structured ASIC solution.
Headquartered in San-Jose California, eASIC Corporation is a privately held company, founded in 1999 by Zvi Or-Bach, the founder of Chip Express. Or-Bach is viewed by many as the “father of Structured ASIC technology”.
|
Related News
- Ambiq Micro Announces $15 Million Funding Round Led by Kleiner Perkins Caufield & Byers
- Orca Systems Raises $5 Million in Series B Funding Round
- Microbridge Completes $5 Million Extension Round of Funding From an International Syndicate of Investors, Raises $12.5 Million to Date
- Cavendish Kinetics Raises $15.5 Million in Second-Round Funding; Additional Investors from US and Germany will Accelerate Progress in Ultra-Low Power Memory Technology
- Kleiner Perkins and Vinod Khosla Invest Additional $7.5 Million in eASIC Corporation
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |