Standards-based IP (by Michael Kaskowitz, President, VSI Alliance)
EE Times: Latest News STANDARDS-BASED IP | |
Michael Kaskowitz (05/28/2004 4:00 PM EDT) URL: http://www.eetimes.com/showArticle.jhtml?articleID=21400154 | |
Consumer applications are creating a demand for complex chips that require specialized functionality, such as cell phones that offer features like e-mail access, digital image capture and MP3 recording. As a result, companies are challenged with using intellectual property (IP) that meets these design and manufacturing requirements. With the economic downturn, electronics companies have been forced to outsource IP and integration services or risk failure, since it is no longer cost-effective or efficient to develop IP internally.
And while some companies are climbing out of the economic rut, they are still working with smaller design teams focused on differentiated product features — not the building blocks — proving that Moore's Law is accelerating at a faster pace than predicted.
This further escalates the need to adopt "quality" IP to reduce the risk of design errors due to the functionality requirements for today's complex designs, and to stay on top of product development schedules. However, for reusable IP to be economically viable, it needs to easily fit into the target system-on-chip (SoC) environment, which requires standard interfaces, complete documentation and an IP verification environment to monitor and exhaustively test the IP functionality.
Although IP is often seen as a commodity technology, its real value lies in its quality and flexibility, and in support from the service provider. IP vendors must understand the requirements of leading industry standards, such as PCI Express, USB On-the-Go and 10-Gbit/second Ethernet, in addition to the specific applications that the customer is developing for a next-generation product. Standards-based IP requires more effort to verify than to develop — thus, opportunities exist for third parties and IP providers to offer solutions that help verify and standardize IP for SoC designs. Doing so will enable the customer to design SoCs with greater reliability and to reuse IP for improved business practices, which will result in better products.
Qualified IP vendors should be able to provide application-specific reference designs to ensure the "right-fit" IP solution. However, few IP vendors can claim such expertise. IP vendors must recognize the importance of the total investment required when working with customers. This means early discussions between the IP vendor and the customer, to ensure proper IP integration to meet business profitability and design reusability. This truly translates into a business partnership for the development of certified, standards-based IP.
The VSIA Quality IP metric establishes a baseline to evaluate the reusability or quality of a given piece of IP. Preliminary work has started in the areas of digital verification, software IP and analog IP. We are making tremendous progress in these areas, which will ultimately result in IP industry standardization, making the process of IP adoption and design reuse easier and more reliable. Michael Kaskowitz, President, VSI Alliance, Wakefield, Mass.
| |
All material on this site Copyright © 2005 CMP Media LLC. All rights reserved. Privacy Statement | Your California Privacy Rights | Terms of Service | |
Related News
- IEEE Forms Study Groups to Explore Creation of Standards Based on VSI Alliance Technology
- SoC Standards Leader VSI Alliance Announces Plans to Close Operations
- European initiative promotes new standards-based SoC design environments
- China Semiconductor Industry Association Signs Agreement to Base Standards on VSI Alliance Standards
- Mentor Graphics Acquires Alcatel Intellectual Property Business to Broaden Portfolio of Standards-Based IP
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIeâ„¢ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |