English
LSI Logic Unveils Industry's Highest Speed DDR-2 SDRAM Physical Layer Memory Interface
- High speed DDR-2 interface core and I/O provide customers a physical layer solution that is easily integrated into their ASIC
- Cuts time, cost and complexity of OEM product development
- Capability enables customers to develop next generation platforms using high performance, high density DDR-2 SDRAMs
LSI Logic's DDR-2 core with SSTL18 I/O interface buffer can be quickly and easily integrated with a customer's own logic for fast system-on-a-chip (SoC) designs. The DDR-2 is a pre-verified interface validated in silicon, significantly reducing the turnaround time and risk of chip development.
"LSI Logic has been highly successful with two generations of memory interface cores," said Jean Bou-Farhat, vice president, CoreWare(R) Division, LSI Logic Corporation. "The DDR-2 cores allow our customers to take advantage of the performance and cost benefits offered by DDR-2 SDRAM memory products. This new addition to the CoreWare library, combined with existing connectivity solutions, helps our customers design systems efficiently and quickly while also reducing risk."
LSI Logic's DDR-2 physical layer interface with pre-verified functionality, layout and timing closure combined with silicon validation, significantly reduces the risk and turnaround time of chip development. The SSTL18 I/O buffer, with features including On-Die Termination (ODT), impedance controlled driver, and precision duty cycle matching, provide an electrical interface of superior signal integrity ensuring optimal performance and first pass success. The DDR-2 cores and SSTL18 I/O are immediately available for customer design-ins and are easy to integrate into an ASIC design.
About CoreWare
The LSI Logic CoreWare IP library provides the industry's most comprehensive set of IP solutions that are of proven quality and are designed to work seamlessly with the standard-cell ASIC and RapidChip(TM) Platform ASIC design flows. Customers can leverage CoreWare IP solutions to significantly reduce risk and turn-around times with complex SoC designs. A dedicated worldwide IP support organization is available to assist customers in all aspects of CoreWare SoC design.
About LSI Logic Corporation
LSI Logic Corporation is a leading designer and manufacturer of communications, consumer and storage semiconductors for applications that access, interconnect and store data, voice and video. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035, http://www.lsilogic.com.Notes to Editor:
1. All LSI Logic news releases (financial, acquisitions, manufacturing, products, technology etc.) are issued exclusively by PR Newswire and are immediately thereafter posted on the company's external website, http://www.lsilogic.com.
2. LSI Logic, the LSI Logic logo, CoreWare and RapidChip are trademarks or registered trademarks of LSI Logic Corporation.
3. Please do not assign a Reader Service number to this release.
SOURCE LSI Logic Corporation
|
||||||
Related News
- ViXS Systems Selects Virage Logic's High-Performance Intelli(TM)DDR 2/3 Memory Interface IP Solution for Video Processing Systems
- LSI Logic DDR interface core delivers up to 400Mb/s for high-speed DDR SDRAM applications
- Virage Logic's DDR Memory Controller Interface Provides High Performance Data Transfer at Higher Efficiency and Lower Power
- MOSAID Introduces Industry's First Double Data Rate (DDR) SDRAM Physical Interface (PHY) Compiler
- LSI Logic Hypertransport physical interface core power high-speed data transfer rates
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
|
E-mail This Article | 
|
|
Printer-Friendly Page |