PLD Applications and Rambus Collaborate on Comprehensive PCI Express* Platform

Rambus PCI Express PHY and PLDA logic IP cores deliver proven solutions to chip designers

LOS ALTOS, Calif. and AIX-EN-PROVENCE, France - June 21, 2004 - Rambus Inc. (Nasdaq: RMBS), a leading developer of chip interface products and services, and PLDApplications (PLDA), a leading provider of PCI Express*, PCI-X and PCI intellectual property (IP) cores, today announced a PCI Express hardware interoperability platform composed of Rambus's PCI Express RaSer physical layer (PHY) core and PLDA's PCI Express digital IP core. This platform provides chip designers access to a proven, fully integrated PCI Express logic and physical layer solution.

"By partnering with Rambus, who has a broad portfolio of proven PHYs, the interoperability platform will be best able to demonstrate the high quality of our PCI Express IP cores. This allows a real turnkey solution for PCI Express-based chip designers and will ensure a smooth and quick design cycle for our customers," said Arnaud Schleich, vice president of sales and marketing at PLDA. "The interoperability and compliance testing achieved with this platform helps reduce the implementation risk for customers needing a PCI Express solution."

"With more than 400 licensees worldwide, PLDA has an impressive track record for delivering PCI/PCI-X cores. Together, we are now taking an important step in extending this success with PCI Express by delivering to customers a fully interoperable platform based on PLDA's logic core technology and our portfolio of PHY products," said Jean-Marc Patenaude, marketing director for the Logic Interface Division at Rambus. "By working with us, customers are getting a proven, low risk and total PCI Express solution and can therefore focus their engineering efforts on other value-add areas of their development program."

The interoperability platform consists of two boards: PLDA's digital core board which plugs into any of Rambus's multiple RaSer PCI Express PHY boards. The PLDA board uses field programmable gate arrays (FPGAs) to house PLDA's implementation of the three critical protocol layers: the Logical PHY layer, the Data Link layer and the Transaction layer. The interface between the two boards will adhere to the industry-standard PHY Interface for PCI Express (PIPE) specifications. The Rambus PHY boards include a chip implementing the analog Physical Media Attachment (PMA) sub-layer and an FPGA for the Physical Coding Sub-Layer (PCS). The Rambus PHY boards support an x4 PCI Express connector so it is able to plug into a PCI Express enabled PC motherboard. The Rambus PHY PMA boards are available in multiple process geometries and foundries, in order to best suit customers' needs.

The Rambus RaSer serial link interface family includes 0.18-micron, 0.13-micron and 90-nanometer versions available on leading foundry processes. Rambus customers are already developing graphics, chipset, switch and bridge chips for applications using the PCI Express standard. In addition, Rambus offers its customers engineering services for chip integration, package, board and system characterization and test in order to ensure success in the development of PCI Express-based chips and boards.

Supporting 32- and 64-bit addressing and suitable for root complex, switch, bridge and endpoint implementation, the PCI Express IP Core from PLDA initially comes in 1- and 4-lane versions for up to 10Gbps bandwidth. All protocol layers (physical, data link, transaction) are implemented, featuring up to 6 BAR addressing spaces and up to 4 DMA channels. The core also provides support for up to 8 traffic-classes (TCs) and "virtual channels" (VCs).

About Rambus Inc.
Rambus is one of the world's leading providers of advanced chip interface products and services. Since its founding in 1990, the company's innovations, breakthrough technologies and integration expertise have helped industry-leading chip and system companies solve their most challenging and complex I/O problems and bring their products to market. Rambus's interface solutions can be found in numerous computing, consumer, and communications products and applications. Rambus is headquartered in Los Altos, Calif., with regional offices in Chapel Hill, North Carolina, Taiwan and Japan. Additional information is available at www.rambus.com.

About PLDApplications
Formed in 1996 by seasoned semiconductor industry engineers and profitable since its inception, PLDApplications (PLDA) is a privately owned company focused on the development and sale of high-quality semiconductor intellectual property cores (SIP) for ASICs, structured-ASICs and FPGAs. Pioneering the PCI IP core market, PLDA was also among the first to introduce a real PCI-X 133MHz core and is today leading the migration to the new PCI Express architecture. These sharp focus and successes that met the needs of more than 400 customers on all continents have made PLDA the 2nd world's largest provider of PCI and derivatives busses IP cores (source Gartner-Dataquest 2003) and a proud member of the 2003 Deloitte European Technology Fast 500. Additional information is available at www.plda.com.

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* PCI Express is a trademark of PCI-SIG.

Rambus is a registered trademark and RaSer is a trademark of Rambus Inc. Other trademarks that may be mentioned in this release are the intellectual property of their respective owners.

Forward-looking statements include statements about the adoption rate of the PCI Express interconnect into and suitability for the computing, consumer and communications markets, as well as the dates of when PCI Express-based systems are expected to ship into their respective markets. Additional forward-looking statements include the ability of Rambus RaSer cells to provide design flexibility in silicon proven process technologies as well as the adoption of these cells in leading PC chipset, graphics, and communication switch and bridge chip applications. These forward-looking statements are subject to risks and uncertainties, which could cause actual results to differ materially from those projected. Those risks include the possibility of reduced market adoption of the PCI Express interconnect protocol, the market response to these products, any delay in the development of Rambus-based products by licensees, any delay in the development and shipment of new Rambus products, any delay in the development and shipment of products compatible with Rambus products, a strong response of the market to competing technology, a failure to sign new contracts or maintain existing contracts for RaSer cell technologies, adverse litigation decisions and other factors that are described in our SEC filings including our 10-K and 10-Qs.