SuperH provides STARC with RISC CPU Core to verify advanced 90nm design methodology
SH-4 based SoC taped out for ASPLA 90nm process
San Jose, USA; Bristol, UK and Tokyo, Japan – 29 June, 2004. SuperH, Inc., the CPU IP supplier of high-performance multimedia RISC CPU cores, today announced that its SH-4 RISC CPU core has been used in the verification of a new SoC (System on a Chip) design methodology developed by STARC (Semiconductor Technology Academic Research Center) of Japan.
SuperH delivered a technology-independent Synthesizable Core Design Kit (SCDK) to STARC for porting onto the 6 -layer low-power 90-nm technology offered by ASPLA (Advanced SoC PLAtform corporation) of Japan. The SH-4 core was ported and the SH-4 based SoCs were taped out successfully by STARC using two different versions of the design flow based on two major EDA vendors’ tools.
STARC is building the industry-wide standard design methodology for advanced technology from Japan, and has emphasized the design porting as well as the silicon verification of the SH- 4 based SoC as a significant step in validating the design methodology.
Throughout the design porting , the design methodology has been proven to resolve various issues that are typically faced in an advanced 90-nm semiconductor product design - (e.g. timing, signal integrity, reliability, and manufacturability) in a short period of time.
The CPU will be prototyped on the ASPLA 90-nm shuttle service using both of the layout design databases generated during the design. The resulting CPUs will then be evaluated and verified as the part of the process of finalizing the design methodology.
The SH4-FPU core is a high performance, dual issue, integer 32-bit RISC CPU family with an integrated vector floating point unit, designed for a range of multimedia applications that require a compact CPU core with integrated vector floating point able to execute both general purpose code and multimedia code such as audio, speech and video codecs. An MPEG-4 video codec implemented fully in software on an SH4-202 core can decode a 384kbps, 15fps CIF image at only 45MHz
Atsushi Hasegawa, VP of Engineering at SuperH, Inc., says. “We expect that the success of this design methodology verification by STARC will expand the opportunities for the 1st tier Japanese semiconductor companies to prototype SuperH core based SoCs in the ASPLA 90- nm process. This verification confirmed the ease of porting of our SH-4 SCDK to a new technology. We will evaluate and verify the test chip in order to register the SH-4 core as SIP in ASPLA 90nm technology.”
Dr. Katsuhiro Shimohigashi, President and CEO of STARC added, “STARC took delivery of the SH-4 RISC CPU core design data from SuperH, Inc., and implemented it on the ASPLA 90-nm low-power technology using STARCAD-21 design methodology (RTLtoGDS2). We are very proud to announce our successful verification of our design methodology using the SH-4 CPU core which is one of the most advanced RISC CPU cores available . This highlights the advantages of our design methodology STARCAD-21. We will further improve this design methodology by getting feedback from the implementations.”
About SuperH, Inc.
SuperH, Inc. is a semiconductor intellectual property (SIP) licensing company and is the leading supplier of multimedia RISC CPU cores to companies building system-on-chip (SoC) products.
SuperH, Inc. develops RISC CPU cores, the SuperHyway Bus on-chip interconnect and software development tools. The SuperHTM family today includes the 32-bit SH-4 and 64-bit SH-5 CPU cores and is ideally suited to multimedia applications that require a single CPU core executing a mix of general-purpose code and DSP algorithms. SuperH CPU cores are targeted at consumer, automotive, telecom and handheld multimedia appliance markets with specific emphasis on set top box, residential gateway, car information systems, modems, digital camera and multimedia players.
Further information about SuperH, Inc. and SuperH products can be found at www.superh.com or www.jp.superh.com
About STARC.
STARC is a research consortium co-founded by 11 major Japanese semiconductor companies established in December, 1995 to contribute the growth of the Japanese semiconductor industry through developing and providing leading edge technologies. Further information about STARC and its activities can be found at www.starc.jp
SuperH is a trademark owned b y Renesas Technology Corp. The names of actual companies and products mentioned herein may be the trademarks of their respective owners.
|
Related News
- SuperH Announces Record-Breaking Scores for 64-bit SH-5 RISC CPU Core
- SuperH Announces Record-Breaking Benchmark Scores for SH4-202 RISC CPU Core
- SuperH chooses TimeSys Linux as embedded Linux solution for SH-4 and SH-5 RISC CPU cores
- Cadence and Imperas Support NSITEXE in the Development of Advanced RISC V Vector Processor IP for Automotive AI Applications
- Andes Technology Corporation Announces Most Advanced Embedded Security Based on Physical Unclonable Functions From Intrinsic-ID Inc. for Its Secure CPU/MCU Cores
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |