Toshiba launches new 64-Bit RISC microprocessor, its first standard processor based on high-performance TX99/H4 core and industry-leading 90nm process technology

High-Performance Microprocessor Takes Aim at Multi-Function Printer and High-End Set-Top Box Applications

SAN JOSE, Calif., July 6, 2004 - Toshiba America Electronic Components, Inc. (TAEC)* today announced the introduction of a new 64-bit single-chip MIPS-based™ reduced instruction set computer (RISC) microprocessor. Designated TX9956CXBG, the new device is the company's first standard microprocessor to employ the Toshiba Corporation (Toshiba) high-performance TX99/H4 CPU core and industry-leading 90 nanometer (nm) process technology. The seven-stage superscalar pipeline architecture enables simultaneous execution of two instructions. With 533 to 666 megahertz (MHz) maximum operating frequency, the TX9956CXBG is currently the highest-performance microprocessor in the Toshiba TX System RISC general-purpose product line. It is targeted at diverse applications, including multi-function printers and high-end set-top boxes.

"With the introduction of the TX9956CXBG, Toshiba continues to grow its bus-compatible, general-purpose microprocessor portfolio to provide scalability and higher performance to customers," said Shardul Kazi, vice president of the RISC Microprocessor and Multimedia Business Unit at TAEC. "Our multi-function printer, high-end set-top box and other customers can upgrade to the TX9956CXBG from existing, lower-frequency processors while keeping the same companion ASICs or off-the-shelf SysAD-compatible chipsets. This reduces time-to-market for system introduction."

Based on the MIPS64^® architecture of MIPS Technologies, Inc., the new true 64-bit microprocessor features the high-performance 64-bit RISC TX99/H4 core and includes both the industry-leading 64-bit MIPS64 instruction-set architecture (ISA) for speed and the MIPS-3D™ Application-Specific Extension (ASE), an instruction set that achieves high-performance 3D geometry processing in digital entertainment and multimedia products. The highly-optimized seven-stage, dual-issue, superscalar pipeline architecture was developed jointly by MIPS and Toshiba.

Key Features
Key features of the microprocessor are as follows:

• Features a high-performance 64-bit RISC TX99/H4 core based on the MIPS 25Kf™ high-end RISC core. The seven-stage superscalar pipeline architecture enables simultaneous execution of two instructions.
• Software-compatible with all MIPS processors, the instruction set includes as subsets the 64-bit instructions of the MIPS64 ISA for high-performance and the MIPS-3D ASE for graphics and multimedia.
• On-chip cache consists of four-way, set-associative 32 Kilobyte (Kbyte) instruction cache and 32Kbyte data cache. The built-in, large-capacity Level 2 cache of 256Kbyte improves execution speed dramatically.
• A 64-bit/32-bit SysAD bus with multiplexed address and data serves as an external system interface and is bus-compatible with the Toshiba TX4955/56 microprocessors for easy upgrade.
• Features high-performance operation
  • Internal maximum operating frequency: 533 to 666MHz
  • External maximum operating frequency: 133MHz
• Has dual power supplies and a power management mode
• The TX99/H4 core contains a dedicated debugging support unit (DSU) and uses an external enhanced JTAG (EJTAG) interface to enable various modes of control such as setting breakpoints. An EJTAG in-circuit emulator is available from third-party vendors.
• Planned supported real-time operating systems include MontaVista® Linux^® from MontaVista Software, Inc. and VxWorks^® from Wind River Systems, Inc.
• A reference board, RBTX9956, will be provided for customer evaluation.

Pricing and Availability
Samples are scheduled to be available in July 2004; sample pricing is planned to be $45.00 each in 100-piece quantities. Interested customers should contact TAEC for attractive high-volume pricing. Volume production is scheduled to start in November 2004.

Technical Specification Summary

Part Number	TMPR9956CXBG-533/-666
Process Technology	90nm process, 6-layer wiring
Power Supply Voltage	Internal: 1.25 Volts (V) External: 3.3V or 2.5V
Core	TX99/H4 core with MIPS64-compliant instruction set Dual-issue, 7-stage superscalar pipeline architecture On-chip IEEE754-compliant single/double precision floating point processing unit On-chip debugging support unit with EJTAG interface
Maximum Operating Frequency	Internal: 533MHz/ 666MHz External: 133MHz
Built-in Cache Memory	Internal cache: 32Kbyte, 4-way set associative Data cache: 32Kbyte, 4-way set associative Unified Level 2 cache: 256Kbyte
Memory Management Unit	48-double entry JTLB and 8-entry Data TLB
Power Saving Modes	RP (Reduced Frequency) mode, Sleep mode
External Bus Interface	64-bit SysAD bus that also supports 32-bit bus mode
Package	272-pin lead-free plastic BGA with 16-pin thermal balls 27mm x 27mm, 1.27mm pitch

About the Toshiba TX System RISC Family of Microprocessors
Toshiba offers a full family of MIPS-based™ Reduced Instruction Set Computer (RISC) microprocessors and peripheral circuits. The Toshiba TX System RISC family consists of 32- and 64-bit processors available as standard products or as an ASIC tailored for an embedded design. The family is comprised of a range of processors from low-power consuming to high-performance and includes special functions essential for the design of embedded products, such as reduced code size and real-time capability. Toshiba offers access to expert technology professionals for design questions and application support.

Toshiba also offers TX39/49/99 System RISC Reference Platforms consisting of hardware, software and system integration tools and documentation based on products from Toshiba. This modular, configurable approach provides a ready-to-use bill of materials and will evolve with the customer's design and industry standards. Customers get a jump on software development and on the competition. Platforms are available for home-entertainment, IP set-top-box, industrial-control, mobile and wireless, and other digital consumer applications.

*About TAEC
Combining quality and flexibility with design engineering expertise, TAEC brings a breadth of advanced, next-generation technologies to its customers. This broad offering includes semiconductors, flash memory-based storage solutions, and displays for the computing, wireless, networking, automotive and digital consumer markets.

TAEC is an independent operating company owned by Toshiba America, Inc., a subsidiary of Toshiba Corporation, one of the five largest semiconductor companies worldwide in terms of global sales for the year 2003 according to Gartner/Dataquest's Worldwide Semiconductor Market Share Ranking. Toshiba is a world leader in high-technology products with more than 300 major subsidiaries and affiliates worldwide. For additional company and product information, please visit TAEC's website at chips.toshiba.com. For technical inquiries, please e-mail Tech.Questions@taec.toshiba.com.

Information in this press release, including product pricing and specifications, content of services and contact information, is current and believed to be accurate on the date of the announcement, but is subject to change without prior notice. Technical and application information contained here is subject to the most recent applicable Toshiba product specifications. In developing designs, please ensure that Toshiba products are used within specified operating ranges as set forth in the most recent Toshiba product specifications and the information set forth in Toshiba's "Handling Guide for Semiconductor Devices," or "Toshiba Semiconductor Reliability Handbook." This information is available at www.chips.toshiba.com, or from your TAEC representative.

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