Sarnoff Silicon IP Offers TV Makers Complete Digital/HDTV Decoding Solution To Meet FCC Mandate
System Decodes Audio And Video, Displays All ATSC Video Formats; Features Include Zoom, Surround Sound
PRINCETON, NJ (July 8, 2004) -- New silicon intellectual property (IP) now available for licensing from Sarnoff Corporation (www.sarnoff.com) makes it easier and more cost-effective for TV makers to meet the FCC requirement that half of all TV sets 36 inches or larger sold after July 1 include digital TV capabilities.
The Sarnoff silicon IP is a complete, integrated audio and video system processor for digital TV, including high definition television (HDTV), ready for incorporation into a television or set-top box design. It will decode and display all standard ATSC digital TV signals at any resolution that the television set can accommodate, up to and including HDTV.
The system also includes full Dolby Digital (AC-3) capabilities for receiving and playing 5.1-channel surround sound.
“This is the most comprehensive silicon IP solution currently available from a single supplier,” said Bill Mayweather, Sarnoff Silicon Strategies Business Director. “It gives TV manufacturers multiple options for adding digital TV capabilities to their sets. It also offers superior image quality, a hallmark of Sarnoff technology since the dawn of color television.”
The digital decoding and display system is capable of decoding all 36 input formats specified by the ATSC standard. Any input format can be displayed at HDTV resolution (1080i and 720p) or at standard resolution (480p and 480i).
“By July 1, 2007 sets as small as 13 inches will be affected by this mandate. It’s unlikely makers will put HD displays in sets this small, so the ability to display HDTV at standard resolutions is crucial,” said Mayweather. “We offer this feature today.”
The display processor is also capable of scaling pictures for zoom in or zoom out effects.
The system includes a transport parser, a 24-bit audio decoder, a 32-bit DDR SDRAM controller, a display processor, an on-screen display, a de-interlacer, and a digital video encoder.
The 24-bit audio decoder subsystem is a very efficient digital signal processor (DSP) solution for decoding the Dolby Digital (AC-3) 5.1-channel surround sound often broadcast as part of a digital TV signal.
Sarnoff’s digital TV IP is available for immediate delivery. The deliverables include Verilog® source code and test benches, firmware, extensive documentation, and engineering support. The IP can be customized to add additional features for specific applications.
Princeton, NJ-based Sarnoff Corporation has a long history of video innovations, including a broad multimedia line of IP cores. The company’s work in video has earned it nine Emmy® awards for technical achievement, two of them in the area of video quality.
For Product Licensing Information, contact us at 609-734-2507, or via our contact form.
A product datasheet for our High Definition Audio/Video System Processor is available on our Silicon Strategies Digital Video IP page.
About Sarnoff
Sarnoff Corporation (www.sarnoff.com) produces innovations in electronic, biomedical and information technology that generate successful new products and services for clients worldwide. Founded in 1942 as RCA Laboratories, it develops breakthroughs in ICs, lasers, and imagers; drug discovery, manufacture and delivery; digital TV and video for security, surveillance, and entertainment; high-performance networking; and wireless communications. Its history includes the development of color TV, the liquid-crystal display, and the disposable hearing aid, and a leadership role in creating the new U.S. digital and HDTV standard. Sarnoff also founds new companies to bring its technologies to market. It is a subsidiary of SRI International.
|
Related News
- Sarnoff Silicon IP For VSB/QAM Demodulation Lets TV Sets Receive Cable or Broadcast Digital/HDTV
- Zoran Announces New Generation9 Elite HDTV Processor Sampling to Leading Worldwide Digital TV Makers
- Alvand Technologies Ships 1 Million Silicon Tuners for Digital TV
- Silicon Harmony Selects Mixed-Signal IP from S3 Group for Advanced Digital TV ASIC
- Xilinx FPGA Development Platform Enables Broadcast Equipment Makers to Meet Real-Time 3D TV Bandwidth and Processing Demands
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |