Faraday Technology Introduces Industry's Smallest PCI-Express Solution at UMC 0.13um
The 0.35mm2and 80mW Features Give Faraday the Clear Leadership as PCI-Express Enters Mainstream Market
Hsinchu Taiwan, and Sunnyvale CA, September 6, 2004 -- Faraday Technology Corporation (TAIEX: 3035), a leading fabless ASIC and IP provider, today announced its PCI-Express solution, which includes a digital architecture PHY and the controller logic. Equipped with a brand new architecture which optimizes for area and power, the PCI-Express PHY is the smallest of any other publicly announced solution. The product will be available in Q1, '05 for customer integration."The entire Faraday is very excited and focused on this next generation high speed I/O," said Hsin Wang, Associate Vice President of R&D at Faraday. "Our leadership in USB PHY and Serial-ATA has built up Faraday's reputation, and now we'll repeat the same success in the next wave of exciting new products."
Indeed, PCI-Express has taken the industry by storm since its first specification adoption in 2003. According to most industry analysis, over 50% of PCs will adopt this standard by 2005. More prominantly, with ATCA and mobile form factor, PCI-Express is poised to become the high speed interconnect interface of choice for mobile devices all the way to telecom/datacom equipments, in addition to the traditional PC and PC peripheral products.
PCI-Express is a new generation of high speed interfaces, sending data serially, instead of in parallel, at extreme speed. This so-called "SerDes" reaches more than 10X in I/O throughput, while lower system level design complexity and cost. However, this technique places premium on the part of the chip designers in being able to achieve very high speed in I/O circuits, 2.5GHz in the case of PCI-Express. This is exactly what Faraday R&D has delivered.
Product Overview
The Faraday PCI-Express PHY solution has its origin in its 3G Serial-ATA PHY. It was one of the very few SerDes able to run at such high speed in a relatively slow 0.18um process. And now, the design challenge is to minimize the size and power consumption, while maintaining the same jitter characteristic of the Serial-ATA PHY.
The Faraday engineering team started from scratch, with a completely new architecture, leveraging a mostly digital design approach to the SerDes to compress the die area. Since most of the operations are done in the digital domain, it also saves power consumption. Lastly, this digital approach yields a much more portable design, which Faraday intends to port to other UMC 0.13um and 90nm processes.
In addition to the PCI-Express PHY, Faraday will also deliver a complete solution for PCI-Express design. This includes full inter-operability testing, a development board, and package design for ASIC customers. This level of product delivery ultimately assures customers the fastest time-to-volume for PCI-Express based products.
"Our customers are very eager about the amazing specification that our R&D team has achieved," said Frankwell Lin, Vice President of Sales at Faraday. "But frankly, what wins it all the time for Faraday is that we deliver a complete solution for our customers, including the compliance testing, and an ASIC operation which speeds up customer's ramp from prototype to volume production."
Product Specification:
Faraday's PCI-Express solution is initially optimized for UMC's HS/Fusion process. It supports both single lane and multi-lane PCI-Express standards. Each single lane only occupies 12 I/O slots, including power & ground, PLL, and all circuitry. The total area for the PCI-Express PHY is less than 0.35mm2.
Pricing and Availability:Faraday's PCI-Express solution will be available for IP licensing for UMC 0.13um HS/Fusion foundry customers as well as for Faraday's ASIC design customers in Q1 of 2005. The one-time licensing fee for the PCI-Express PHY is $250,000 with royalty, and the PCI-Express controller is $200,000 with royalty.
About Faraday Technology Corporation
Faraday Technology Corporation is a leading silicon IP and fabless ASIC vendor. The company's broad IP portfolio includes 32-bit RISC CPUs, DSPs, USB 2.0, Ethernet, PCI-Express and Serial ATA. With more than 500 employees and 2003 revenue of $111 million, Faraday is one of the largest fabless ASIC companies in the Asia-Pacific region, and it also has a significant presence in other markets, world-wide. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, please visit: http://www.faraday-tech.com
|
Faraday Technology Corp. Hot IP
Related News
- Stretch Inc. Introduces World's First 16-Channel H.264 Digital Video Recorder in a PCI-Express Add-in Card
- Faraday Implements Ultra Small ARM926EJ-S Hard Core in UMC 0.13um Process
- Cosmic Circuits introduces industry's lowest power 10-bit 1MSPS ADC IP-block in 0.13um process
- Impinj Aligns With UMC to Deliver Logic NVM Cores on 0.18um and 0.13um Process Technologies
- Chipidea's USB 2.0 OTG High Speed IP Core Silicon Proven on UMC's 0.13um Technology
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |