DAFCA Receives $1.8 Million ATP Grant to Develop Reconfigurable Infrastructure Platform for System-on-Chip Electronics
FRAMINGHAM, Mass. – September 28, 2004 – DAFCA Inc., a provider of electronic design automation (EDA) software tools that enable rapid debug and faster time-to-volume of complex SoCs, today announced that the company has been awarded an Advanced Technology Program (ATP) grant totaling $1.8 million from the National Institute of Standards and Technology (NIST), a division of the U.S. Department of Commerce. The grant will fund a three-year research program that aims to extend applicability of their reconfigurable infrastructure platform for system-on-chip (SoC) devices.
NIST’s ATP awards are granted to applicants on the basis of technological difficulty and innovation, as well as economic benefits to the nation. DAFCA’s ATP grant will fund creation of in-situ error correction and yield enhancement tools that would save the semiconductor industry several billion dollars per year.
“Every SoC design team - from large device manufacturers to fabless semiconductor companies - is a potential beneficiary of the technology we will create with ATP’s support,” said Peter L. Levin, DAFCA’s president and CEO. There are over 1,750 SoC design starts per year. “These chips integrate the once-discrete components found inside products like cell phones and digital cameras, and almost always require some sort of silicon debug. We are very pleased that ATP shares our view that a breakthrough in SoC debug and fix that results in faster time-to-volume production of next generation devices will make a significant contribution to our country’s economy. This is an exciting project, and we are eager to get started.”
DAFCA co-founder and chief technology officer, Miron Abramovici, will lead the effort as principal investigator.
DAFCA merges conventional ASIC technology with a new form of reconfigurable logic. The company’s pre-silicon tools insert infrastructure intellectual property (IP) in the form of a distributed reconfigurable fabric into an SoC during its design process. In contrast to fixed-logic infrastructure that is used once and then becomes permanent, rigid ballast, DAFCA’s fabric provides an infrastructure platform that can be reconfigured and reused by post-silicon tools to implement different applications. This new technology enables chip designers to rapidly achieve working silicon and significantly reduces the time-to-market of their end product. Initially funded by private investors, this technology has attracted early customers and technology development partners. DAFCA is well-positioned to lead the deployment and establish the standard for reconfigurable infrastructure.
The first version of DAFCA’s technology will support a subset of the assertions ordinarily used in pre-silicon verification. The company will apply ATP funding to address the challenge of incorporating complex design assertions into the basic reconfigurable system. This research will expand the range of meaningful simulation-to-silicon comparisons, shorten the debug and error correction cycles, and accelerate the proliferation of reconfigurable infrastructure in design methodologies.
About the Advanced Technology Program
About DAFCA
DAFCA is an electronic design automation (EDA) software company developing a product suite for the post-silicon debug and error correction inside large systems-on-chip (SoC) integrated circuits. DAFCA’s reconfigurable infrastructure will enables chip designers to rapidly achieve working silicon and significantly reduce the time-to-market of their devices. Learn more about the company by visiting their web site at http://www.dafca.com.
Editor’s Note: Please see the following link to read the NIST announcement of this award: http://www.nist.gov/public_affairs/releases/atpaward09-04.htm
A link to the NIST factsheet on this ATP competition can be found at: http://www.nist.gov/public_affairs/factsheet/atp2004/00-00-6773_factsheet.htm
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