English
ARM's Neon: Too late to the portable party?
by Maury Wright, Editor-at-Large -- , 10/7/2004
Timed to coincide with the In-Stat Fall Processor Forum this week, ARM announced Neon, an extension to its processor architecture that relies on a new 64/128-bit execution unit and instruction set. According to ARM, the SIMD (single instruction multiple data) architecture will easily handle multimedia and even baseband-wireless processing in mobile and consumer products.
The company cites the ability to run an MP3 audio decoder using less than 10 CPU MHz and a GSM speech codec using only 13 CPU MHz. Neon will offer a software approach to multimedia requirements, while the ARM Optimode technology announced last spring allows designers to spin dedicated cores for specific applications, such as video encoding, that can be implemented much more efficiently with dedicated hardware blocks.
Click here to read more .....
Timed to coincide with the In-Stat Fall Processor Forum this week, ARM announced Neon, an extension to its processor architecture that relies on a new 64/128-bit execution unit and instruction set. According to ARM, the SIMD (single instruction multiple data) architecture will easily handle multimedia and even baseband-wireless processing in mobile and consumer products.
The company cites the ability to run an MP3 audio decoder using less than 10 CPU MHz and a GSM speech codec using only 13 CPU MHz. Neon will offer a software approach to multimedia requirements, while the ARM Optimode technology announced last spring allows designers to spin dedicated cores for specific applications, such as video encoding, that can be implemented much more efficiently with dedicated hardware blocks.
Click here to read more .....
Related News
- Zilog's broader 32-bit MCU move: Too little, too late?
- NXP Announces ARM Cortex-M4-based MCU with Industry's Largest Embedded SRAM Memory, Optimized for Portable Devices
- ARM Acquisition: What's In It for SoftBank?
- Who Gains the Most from ARM's New IP?
- The 8051 MCU: ARM's nemesis on the Internet of Things?
Breaking News
- Andes Technology and proteanTecs Partner to Bring Performance and Reliability Monitoring to RISC-V Cores
- Arteris Releases the Latest Generation of Magillem Registers to Automate Semiconductor Hardware/Software Integration
- Imagination takes efficiency up a level with latest D-Series GPU IP
- Q.ANT and IMS CHIPS Launch Production of High-Performance AI Chips, Establish Blueprint for Strengthening Chip Sovereignty
- sureCore PowerMiser IP enables KU Leuven chip for AI applications to achieve dynamic power saving of greater than 40%
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- Cortus MINERVA Out-of-Order 4GHz 64-bit RISC-V Processor Platform targets automotive applications
- Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
|
E-mail This Article | 
|
|
Printer-Friendly Page |