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Denali Announces Products for ARM's AMBA AXI Interface
Denali's New PureSpec, Databahn Speed Deployment of ARM-Based Systems
PALO ALTO, Calif., Oct. 19, 2004 -- Denali Software, Inc., today announced two new products -- an intellectual property (IP) core and design and verification IP software -- for use in the design and verification of chips incorporating ARM's AMBA(TM) AXI interface.
This announcement coincides with the ARM Developers' Conference where Denali, the leading provider of electronic design automation (EDA) tools and IP for chip interface design and verification, is a sponsoring exhibitor. The conference starts today and runs through Thursday, October 21, at the Santa Clara Convention Center in Santa Clara, Calif. For details, visit: http://www.arm.com/developersconference/ .
Denali's new verification IP product, PureSpec-AXI, leverages technology from its PureSpec(TM) product line to provide a comprehensive solution for pre-silicon verification of functionality, compliance and system-level verification of designs utilizing the AMBA AXI architecture.
The new IP core, Databahn-AXI, builds upon Denali's silicon-proven Databahn(TM) DDR controller IP, and provides developers with a native AMBA AXI interface for its DDR-based memory controller cores.
PureSpec-AXI
PureSpec-AXI is a comprehensive solution for verifying functionality, compliance and interoperability of AMBA AXI-based designs at the pre-silicon stage of chip or IP core development. It models the full AMBA AXI protocol specification, and includes a complete set of assertions for temporal and functional verification of the interface. For system-level verification, PureSpec provides a sophisticated data generation engine to help drive de.ned, psuedo-random bus traf.c at all layers. Injected errors and error conditions are .agged and recovered according to AMBA AXI interface speci.cations. The integrated nature of PureSpec-AXI's model behavior and data generation engine applies a sophisticated context-sensitive data generation approach to test plan execution. This enables direct translation from test plan de.nition to implementation, accelerating the veri.cation task and improving overall verification productivity. A cumulative coverage database capability ensures that the overall test plan sufficiently exercises the design. For more information, visit: www.denali.com/purespec.
Denali's Databahn-AXI
Licensed for use in more than 100 designs by leading semiconductor and system companies, and with more than 35 chips in production, Databahn is the industry-leading memory controller IP solution. Databahn cores are configurable for a wide range of performance and power requirements, as well as application specific integrated circuit (ASIC) interfaces, now including the AMBA AXI standard. To ensure compatibility with all the latest high-speed memory technologies, the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest SDRAM, DDR1-SDRAM, DDR2-SDRAM and Mobile DDR-SDRAM devices from all major memory vendors. Deliverables include: register transfer level (RTL) and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, programmable register settings and documentation. The silicon-proven Databahn IP is library independent and covers solutions from .18-micron to .09-micron technologies, and DRAM device frequencies from 100-400MHz (200-800MHz data rate).
For more information about specific features and configurability options, visit: www.denali.com/databahn.
About Denali Software
Denali Software Inc. is the world's leading provider of EDA tools and IP solutions for chip interface design, integration and verification. Its Databahn Design IP products offer fully configurable design cores for complex interfaces such as Serial ATA II and DDR-based memory systems. Denali's PureSpec Verification IP product supports all complex interfaces, including PCI Express, Advanced Switching Interconnect (ASI), USB, and Serial ATA II. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, visit Denali at www.denali.com or contact call 650-461-7200.
NOTE: The Denali logo, Databahn, eMemory, MMAV, and PureSpec are trademarks of Denali Software Inc. All other trademarks are the property of their respective owners.
PALO ALTO, Calif., Oct. 19, 2004 -- Denali Software, Inc., today announced two new products -- an intellectual property (IP) core and design and verification IP software -- for use in the design and verification of chips incorporating ARM's AMBA(TM) AXI interface.
This announcement coincides with the ARM Developers' Conference where Denali, the leading provider of electronic design automation (EDA) tools and IP for chip interface design and verification, is a sponsoring exhibitor. The conference starts today and runs through Thursday, October 21, at the Santa Clara Convention Center in Santa Clara, Calif. For details, visit: http://www.arm.com/developersconference/ .
Denali's new verification IP product, PureSpec-AXI, leverages technology from its PureSpec(TM) product line to provide a comprehensive solution for pre-silicon verification of functionality, compliance and system-level verification of designs utilizing the AMBA AXI architecture.
The new IP core, Databahn-AXI, builds upon Denali's silicon-proven Databahn(TM) DDR controller IP, and provides developers with a native AMBA AXI interface for its DDR-based memory controller cores.
PureSpec-AXI
PureSpec-AXI is a comprehensive solution for verifying functionality, compliance and interoperability of AMBA AXI-based designs at the pre-silicon stage of chip or IP core development. It models the full AMBA AXI protocol specification, and includes a complete set of assertions for temporal and functional verification of the interface. For system-level verification, PureSpec provides a sophisticated data generation engine to help drive de.ned, psuedo-random bus traf.c at all layers. Injected errors and error conditions are .agged and recovered according to AMBA AXI interface speci.cations. The integrated nature of PureSpec-AXI's model behavior and data generation engine applies a sophisticated context-sensitive data generation approach to test plan execution. This enables direct translation from test plan de.nition to implementation, accelerating the veri.cation task and improving overall verification productivity. A cumulative coverage database capability ensures that the overall test plan sufficiently exercises the design. For more information, visit: www.denali.com/purespec.
Denali's Databahn-AXI
Licensed for use in more than 100 designs by leading semiconductor and system companies, and with more than 35 chips in production, Databahn is the industry-leading memory controller IP solution. Databahn cores are configurable for a wide range of performance and power requirements, as well as application specific integrated circuit (ASIC) interfaces, now including the AMBA AXI standard. To ensure compatibility with all the latest high-speed memory technologies, the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest SDRAM, DDR1-SDRAM, DDR2-SDRAM and Mobile DDR-SDRAM devices from all major memory vendors. Deliverables include: register transfer level (RTL) and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, programmable register settings and documentation. The silicon-proven Databahn IP is library independent and covers solutions from .18-micron to .09-micron technologies, and DRAM device frequencies from 100-400MHz (200-800MHz data rate).
For more information about specific features and configurability options, visit: www.denali.com/databahn.
About Denali Software
Denali Software Inc. is the world's leading provider of EDA tools and IP solutions for chip interface design, integration and verification. Its Databahn Design IP products offer fully configurable design cores for complex interfaces such as Serial ATA II and DDR-based memory systems. Denali's PureSpec Verification IP product supports all complex interfaces, including PCI Express, Advanced Switching Interconnect (ASI), USB, and Serial ATA II. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, visit Denali at www.denali.com or contact call 650-461-7200.
NOTE: The Denali logo, Databahn, eMemory, MMAV, and PureSpec are trademarks of Denali Software Inc. All other trademarks are the property of their respective owners.
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