Register File with low power retention mode and 3 speed options
IPCore Adds TriCN to IP Provider List
CUPERTINO, CA - November 15, 2004 - IPCore Technologies, a global IC design service company, has added TriCN, a leading developer of semiconductor interface intellectual property (IP) products, to its list of third party IP providers for its designs. TriCN provides a broad portfolio of interface IP products, ranging from Base I/O libraries for pad-ring construction, to high-speed memory interfaces, and multi-gigabit PHY products including PCI Express.
"High-quality interface design is a fundamental requirement for our customer's ICs, and TriCN has a well-earned reputation as high performance interface specialists," commented Wilson Yu, Senior Vice President- Marketing of IPCore Technologies. "We welcome the inclusion of their products into our offering."
"We are excited to partner with IPCore Technologies," remarked Steve McConnell, Vice President - Marketing for TriCN. "The pairing of TriCN's high performance interface products with IPCore's highly optimized design services is a winning combination for customers."
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip. All products are designed using rigorous signal integrity and timing analysis to ensure first time power-up success. Products include Base I/O libraries for pad-ring creation, high-performance memory and networking interfaces, multi-function I/O's compatible with multiple interface protocols, and multi-gigabit SerDes products. TriCN's customers range from fabless semiconductor to systems companies and independent design manufacturers.
About IPCore Technologies
IPCore Technologies is a global IC design service company. With offices in China, United States, Japan, Hong Kong, and Taiwan, IPCore delivers the most competitive IC design service solution to clients worldwide. IPCore can give your product an extra competitive edge in lower power, higher performance or smaller die due to its core competency in optimization. Optimization is aided by broad selection of internal and external tools and supported by a team of experienced IC professionals. IPCore is the One-Stop-Silicon-Solution company with flexible business models whether you need standard ASIC design service or full turnkey solution from concept to product. For more information, please call (408) 252-5282 or visit http://ipcoreinc.com.
|
Related News
- QuickLogic Adds GlobalFoundries 22FDX Process to its Growing List of Australis IP Generator-Based eFPGA IP
- Magma Adds ChipIdea to Growing List of ''Magma-Ready'' IP Providers
- Mirabilis Design Adds System-Level Modelling Support for Industry-Standard Arteris FlexNoC and Ncore Network-on-Chip IPs
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
- Crypto Quantique adds TRNG to its quantum-derived, side-channel protected PUF hardware IP block
Breaking News
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
- Cadence Enables Next-Gen AI and HPC Systems with Industry's Fastest HBM4 12.8Gbps IP Memory System Solution
- S2C and Andes Technology Announce FPGA-Based Prototyping Partnership to Accelerate Advanced RISC-V SoC Development
- PQShield launches UltraPQ-Suite for deeply specialized implementations of post-quantum cryptography
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
Most Popular
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- Cadence to Acquire Arm Artisan Foundation IP Business
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New Breakthroughs in China's RISC-V Chip Industry
- Ceva Neural Processing Unit IP for Edge AI Selected by Nextchip for Next-Generation ADAS Solutions
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |