ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
STMicro debuts RISC-based configurable SoC
EE Times: Latest News STMicro debuts RISC-based configurable SoC | |
Mark LaPedus (02/07/2005 4:19 PM EST) URL: http://www.eetimes.com/showArticle.jhtml?articleID=59301652 | |
SAN FRANCISCO — At the International Solid State Circuits Conference (ISSCC), STMicroelectronics Inc. outlined a novel approach for configurable processors. STMicroelectronics (Geneva) rolled out the XiSystem architecture, which is RISC-based system-on-a-chip (SoC) design with reconfigurable I/O modules. "XiSystem is a XiRISC-based SoC that moves towards system-level configurability, providing user-defined applications-specific computing blocks and I/O interfaces, with no need to change silicon," according to STMicroelectronics. Based on a 130-nm CMOS process, the XiRISC SoC features a double-datapath VLIW RISC processor. It is enhanced with a DSP-like function units and with a pipeline configurable data-path, called PiCoGa.
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