Virtual Silicon Announces Industry's First Delta-Sigma Fractional-N PLL Digital Frequency Synthesizer for Generic CMOS
Innovative low power design accepts input frequency from1MHz to 300MHz and outputs any frequency from 88kHz to 3000MHz in TSMC’s 0.13-micron, general-purpose process
Sunnyvale, CA - February 15, 2005 - Virtual Silicon Technology, Inc., a leader in semiconductor intellectual property (IP), today announced immediate availability of the industry’s first fully integrated Digital Frequency Synthesizer (DFS). This Delta-Sigma Fractional-N Phase Locked Loop (PLL) product allows the SoC designer to synthesize the exact output frequencies to suit an individual project.
The Virtual Silicon DFS includes the first Delta-Sigma Fractional-N PLL IP for the generic CMOS market. There is no special processing for mixed-signal circuits. The DFS has the widest frequency range available – 1-300MHz input and 88kHz to 3000MHz output – and multiplies a clock input by 0.50000 to 999.99988, providing the ability to use any crystal to get any frequency, reducing crystal inventory and material costs.
The Virtual Silicon DFS is also the first product to provide flexible Fractional-N frequency multiplication and Clock Deskew in one PLL, further reducing IP purchasing challenges and inventory. With the lowest power, 1mW at 1.2V with 400MHz output, and lowest operating voltage (0.8V), the DFS supports power managed applications and Virtual Silicon’s patented Mobilize™ power management technology. The DFS fits in the I/O ring or core (0.04mm2 including power pads), and the fully programmable PLL enables optimization of frequency, phase noise, jitter and power for each individual application.
The Virtual Silicon DFS is a very low power delta-sigma fractional-N PLL that does not sacrifice performance. In the past, PLLs were required to use more power to achieve higher frequencies and lower jitter. The advanced mixed-signal design techniques used by Virtual Silicon enable high performance while consuming low power - optimal for battery operated consumer products. The use of a single core supply reduces power and eliminates dual voltage supplies often required by other PLLs. Fine grained frequency synthesis enables one DFS to support many applications. To reduce system power lost during startup and to speed up frequency changes, the DFS lock time is <500 input clock cycles at start and <250 input cycles for a frequency hop. Attention to noise sources and circuit stability resulted in low cycle-to-cycle jitter of 20ps p-p at 800MHz for DDR2 and other timing aggressive designs.
For high frequency timing the DFS has an optional 3000MHz pre/post divider macro with 50% duty cycle that enables >300MHz on the input or it can be used to further reduce the output clock frequency.
“The Virtual Silicon programmable DFS provides a designer the ability to use any crystal to generate any frequency using generic CMOS process technology," said Barry Hoberman, CEO of Virtual Silicon. “This high level of reconfigurability and flexibility delivers real benefits of reduced inventory and delivery time and a lower bill of materials cost to the SoC designer.” Hoberman added, “Virtual Silicon has provided over 50 silicon proven designs of PLLs and frequency synthesizers. These high quality low-jitter, silicon-proven hard macros benefit from Virtual Silicon's experience in delivering reliable frequency synthesizers for complex SoCs.”
“Virtual Silicon’s DFS PLL product continues the collaboration between Virtual Silicon and TSMC,” said Edward Wan, senior director of design service marketing at TSMC. “Their new IP provides robust solutions to our customers, and adds to TSMC’s IP portfolio, which is the broadest and deepest in the industry.”
Product Availability:
The Virtual Silicon programmable DFS is available today on the TSMC 130nm generic logic process (CL013G), with expected availability on the 130nm LV-OD (CL013LV-OD) process and the 90nm generic logic process (CLN90G) in calendar Q1 2005. For product information and access to the datasheet, please register in the Virtual Silicon customer center at www.virtual-silicon.com/customer_center.cfm
About Virtual Silicon Technology
Virtual Silicon is a leading supplier of semiconductor intellectual property and process technology to manufacturers and designers of complex systems-on-chip (SoC). Headquartered in Sunnyvale, CA, the company provides process-specific embedded components that serve the wireless, networking, graphics, communication and computing markets. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and SoC developers who demand leading edge technology for their semiconductor innovations. For more information, call (408) 548-2700 or visit Virtual Silicon online at www.virtual-silicon.com.
Copyright © 2005, Virtual Silicon Technology Inc. All rights reserved.
Your Source for IP®, Silicon Ready,®, Moblize™, The Heart of Great Silicon® and Virtual Silicon are trademarks of Virtual Silicon Technology, Inc.
|
Related News
- Silicon Creations Successfully Tapes Out Complex RF Chip Using Simucad's Complete RF Tool Flow
- K-Micro Licenses Virtual Silicon 90nm Mobilize PLL Digital Frequency Synthesizer
- Silicon Creations' Fractional-N PLL Technology Leveraged at Israel's Bar-Ilan University SoC Lab
- Tahoe RF Semiconductor Offers New Fractional-N Synthesizer
- SiGe Semiconductor Licenses Kaben Research Fractional-N Synthesizer IP
Breaking News
- SIA Statement on Biden Administration Action Imposing New Export Controls on AI Chips
- BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
- Exostiv Labs Unveils AMD Versal Adaptive SoC Device Support for Exostiv and Exostiv Blade Platforms
- TSMC December 2024 Revenue Report
- NASA Awards Alphacore Four Contracts for Radiation Hardened Microelectronics Innovation
Most Popular
- Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
- VeriSilicon's Display Processing IP DC8200-FS has achieved ISO 26262 ASIL B certification
- OPENEDGES and TAKUMI partner to promote ORBIT Memory Subsystem IP in Japan
- CEVA Opens New Research and Development Center in Bristol, U.K.
- TTTech divests strategic stake in landmark transaction to NXP to fuel future growth with technology investments in core business
E-mail This Article | Printer-Friendly Page |