Indian companies are opting for FPGAs to reduce their product development costs
30 minute interview
Richard W Sevcik,
Executive Vice President (Programmable Logic Solutions), Xilinx
FPGAs will overtake ASICs, says Xilinx Inc, the world’s third largest supplier of ASICs Click here to read more ..... |
Related News
- Altera FPGAs and IP with New Functional Safety Development Board and Reference Designs Reduce SIL 3 Development and Certification Costs for Industrial Designs
- Microchip FPGAs Speed Intelligent Edge Designs and Reduce Development Cost and Risk with Tailored PolarFire® FPGA and SoC Solution Stacks
- TranSwitch(R) Corporation Licenses MIPS32(R) 4KEc(R) Pro Processor Core to Reduce Development Costs, Speed Time-to-Market
- BrainChip and Circle8 Clean Technologies/AVID Group Work to Reduce and Recycle Waste Through Joint Development of Intelligent "Smart Bins"
- Dolphin Design chooses DEFACTO's SoC Compiler 9.0: a turnkey methodology to reduce project costs and increase team efficiency
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |