Altera rolls out 10 cores for comms system market
![]() |
Altera rolls out 10 cores for comms system market
By Michael Santarini, EE Times
January 29, 2001 (11:08 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010129S0031
Altera Corp. (San Jose) has announced the first fruits of its acquisition of intellectual-property vendor DesignPro (Ottawa): 10 cores that target the communications system market.
The cores include an asynchronous transfer mode cell; Point-to-Point Protocol packet and Sonet/synchronous digital hierarchy framers for transmission systems with data rates of up to 622 Mbits/second (STS-12c/STM-4); a clear-channel T3 framer; and a T3 mapper to Sonet (STS-1).
Participants in the Altera Megafunction Partners Program offer similar cores. But according to Andrew Bunsick, senior product-marketing engineer, Altera's cores have been optimized for its Apex devices and can be mixed and matched to create complete solutions.
Users can assemble the cores to carry ATM cells or PPP packets over any transmission medium or to carry T3 signals over a Sonet/SDH optical network.
The Sonet/SDH, ATM cell, PPP packet and T3 framing and mapping can all be configured with Altera's MegaWizard graphical user interface, which lets users adjust the cores for optimal performance and area.
The company claims users can implement a PPP packet processor at 622 Mbits/s in 50 percent of an Apex 20K60E device, for a solution costing less than $10.
Prices are $31,995 for the Sonet STS-1 framer, $33,995 for the Sonet/SDH STS-3c/STM-1 framer, $33,995 for the Sonet/SDH STS-3/AU-4 framer and $49,995 for the Sonet/SDH STS-12c/STM-4 framer.
The ATM cell processor at 155 Mbits/s is $15,995 ($23,995 for 622 Mbits/s). The 155-Mbit/s PPP packet processor is available for $12,995 ($19,995 for 622 Mbits/s). The T3 framer is priced at $19,995 and the T3 mapper for $21,995.
The cores are available with user guides. Customers can evaluate the cores free via Altera's OpenCore feature, available at www.altera.com/IPmegastore.
Related News
- Actel Rolls Out Industry's First FPGA-Based System Management for MicroTCA Market
- Altera Rolls Out New, Easy-To-Use Arria V Early Power Estimator Tool
- SpringSoft Rolls Out Advanced Technology Platform for Certitude Functional Qualification System
- Altera Rolls Out Production Shipments of Low-Cost, Low-Power Cyclone IV FPGAs
- NEC Electronics Rolls Out USB 3.0 SOC Design Solution to Speed Customer Time to Market
Breaking News
- Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |