Altera's Stratix II Family Leads the Industry With 2X Signal Integrity Performance Over Competing FPGAs

Altera Reinforces its 90-nm Technology Leadership as Stratix II Family Continues to Outshine Competing FPGAs

San Jose, Calif., March 1, 2005—Altera Corporation (NASDAQ: ALTR) today released a technology white paper describing the Stratix^® II FPGA family’s 2X signal integrity performance advantage over competing FPGAs. The paper describes how Altera provides customers with industry-leading signal integrity for Low-Voltage Differential Signaling (LVDS), and High-Speed Transceiver Logic (HSTL) I/O technologies. Stratix II FPGAs use advanced chip and package technologies to gain this competitive advantage while simultaneously delivering up to 21 percent more user I/O pins (in equivalent packages) and excellent Simultaneous Switching Noise (SSN) immunity.

As high-speed I/O pins are increasingly employed in the design of high-performance systems, the importance of signal integrity has become significant. Poor signal integrity complicates and lengthens system design, and can cause system reliability issues and field failures. To help customers avoid these issues, signal integrity was a primary focus in the design and development of the Stratix II FPGA family. Altera’s decision to separately optimize vertical and horizontal I/O banks for specific I/O standards in the design of Stratix II FPGAs is a key factor behind the family’s industry-leading signal integrity. In fact, these optimized I/Os enable pin capacitance that is 50 percent lower than competing FPGAs, and is the primary contributor to Altera’s 2X advantage in signal integrity.

In addition, Stratix II packages include power and ground planes that minimize the need for power and ground I/O pins and maximize the number of user-available I/O pins. This enables Stratix II FPGAs to offer up to 21 percent more user I/O pins in a given package as compared to competing FPGA devices while maintaining stellar signal integrity. Laboratory experiments show no ground bounce violations even with 100 percent I/O toggling demonstrating the excellent SSN immunity of Stratix II FPGAs.

“Once again, benchmarks demonstrate another significant advantage customers have when they turn to Stratix II FPGAs for their high-performance applications,” said David Greenfield, senior director of product marketing for high-density FPGA products. “Today, Stratix II FPGAs deliver 82 percent more logic capacity, 39 percent greater performance, and 2X signal integrity compared to competing FPGA devices. The Stratix II family is clearly the leading high-performance FPGA family in 90-nm, and, in addition it offers a unique migration path to a lower-cost, higher-performance, and lower power HardCopy^® II structured ASIC device.”

Altera’s signal integrity comparisons use the latest IBIS I/O models available from each vendor. Altera’s models are tightly correlated to lab measurements of actual silicon operating at up to 1 Gbps. The comparison results between Stratix II and competitive FPGA devices are included in the Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs white paper. This white paper also covers how the comparisons were made so that users can repeat the experiments themselves, as well as a technical explanation of how Stratix II devices achieve their industry-leading signal integrity.

The Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs white paper is available at www.altera.com/literature/wp/signal-integrity_s2-v4.pdf .

Altera Corporation (NASDAQ: ALTR) is the world’s pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.

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