Newest Release of SonicsMX Addresses H.264 and Legacy Interconnectivity
Mountain View, CA - March 7, 2005 - Sonics Inc.™, the premier supplier of system-on-chip (SoC) SMART™ Interconnects, today announced the general availability of an enhanced version of its SonicsMX SMART Interconnect to ease the architectural challenges of advanced multimedia streaming requirements and also provide seamless connection to existing intellectual property cores.
The new 128-bit data width configuration option allows SoC developers to integrate and optimize high performance advanced multimedia subsystems, such as H.264 video decoders, into SoCs traditionally dominated by 32-bit data interfaces. SonicsMX seamlessly supports an arbitrary mix of 32-, 64-, and now 128- bit wide data paths on a per-subsystem basis, and automatically packs and unpacks data transfers to provide optimal use of SonicsMX and shared memories.
“Cell phone SoC developers are now at an architecture inflection point with respect to advanced multimedia streaming,” says Drew Wingard, CTO of Sonics. “The 128-bit data width feature allows our customers to address this architectural inflection point by leveraging wide interconnect paths to embedded and external memories while preserving their investment in existing 32 and 64 bit subsystems.”
The native AHB option allows developers with large investments in AHB compliant cores to immediately incorporate SonicsMX into their SoC architecture and significantly increase SoC performance, while also building in architecture flexibility to convert legacy IP cores to conform with OCP- IP standards at their own pace.
About SonicsMX
SonicsMX is the result of collaboration between Sonics and Texas Instruments.
It is a low-power consumption, flexible interconnect that supports cross bar, shared linked, and hybrid topologies, which is paramount to efficiently converging latency dependent data communications and throughput dependent multimedia streaming into advanced wireless handheld devices. An aggressive power management scheme supports both clock removal and supply voltage isolation to deliver a best-of- class power-area solution that can be implemented in a low leakage manufacturing process. These features are only found in SonicsMX, the emerging defacto standard for advanced wireless handheld SoCs. Toshiba Corporation is among the early adopters of this break-through SMART Interconnect.
About Sonics
Sonics, Inc. is a leading provider of SMART Interconnects that deliver high SoC design predictability and increased design efficiency. Major semiconductor and systems companies including Broadcom, Samsung, Texas Instruments and Toshiba have applied Sonics SMART Interconnects in leading products in the wireless, digital multimedia and communications markets. Sonics is a privately held company funded by Investar Capital, Smart Technology Ventures, TL Ventures, Easton Hunt Capital, JAFCO Ventures, and H&Q Asia-Pacific. For more information, see www.sonicsinc.com
# # #
SMART, SonicsMX, SonicsMXC, SiliconBackplane, SonicsStudio and MemMax are trademarks of Sonics, Inc. All other trademarks and registered trademarks are the property of their respective owners.
|
Related News
- Sand Video to release industry's first low power MPEG4-AVC/H.264 decoder core for video enabled mobile applications
- ATEME releases third generation H.264 core engine
- NEC Electronics Announces iDTV SoC Supporting H.264/AVC with Full HD processing
- Ambric Announces H.264 Acceleration Support for Apple Mac OS X Leopard
- ARM Releases AAC, MP3, MPEG-4, H.264 and FFT OpenMAX DL Libraries, Highly Optimized for Cortex-A8/NEON and ARM11 Processors
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |