Toshiba offers 32-bit MCUs based on new CISC processor core
Toshiba offers 32-bit MCUs based on new CISC processor core
By Semiconductor Business News
January 23, 2001 (3:04 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010123S0070
TOKYO -- Toshiba Corp. today announced two new 32-bit complex-instruction set computer (CISC) microcontrollers with integrated 128-kilobytes of ROM and 6-Kbytes of RAM. The MCUs are the industry's first 32-bit microcontrollers based on a CISC architecture with that level of memory on chip, according to Toshiba. The TMP92CW53F and 92CW10F contains a new 32-bit central processing unit core, called the TLCS-900/H1. Toshiba said the CPU core has been designed for lower power consumption and enhanced processor performance compared to other solutions, including MCUs based on reduced instruction set computing (RISC). The controllers also integrate a phase-locked loop (PLL) circuit that converts 10 MHz external signals to the CPU's internal clock rate of 20 MHz. Operating at 75 milliwatts, the microcontrollers have the ability to execute 12.25 million instructions per second (MIPS). Toshiba is aiming the new microcontrollers are personal digita l assistants (PDAs), CD-ROMs, DVD-ROMs, automotive systems, and controllers in audio products. The TMP92CW53F integrates a controller-area network (CAN) function for communications in industrial and automobile applications. Samples of TMP92CW53F and development tools are available now with mass production starting in June. The TMP92CW10F will be available in March with volume production starting in September. The 92CW53F will sell for $20 each in quantities of 500,000, while the 92CW10F is priced at $15 each.
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