Costello's analog automation pioneer, Barcelona, to fold
EE Times: Latest News Costello's analog automation pioneer, Barcelona, to fold | |
Richard Goering (03/04/2005 1:21 PM EST) URL: http://www.eetimes.com/showArticle.jhtml?articleID=60405676 | |
SANTA CRUZ, Calif. Analog synthesis and intellectual property (IP) provider Barcelona Design Inc. is shutting down, EE Times has learned. Launched with a Web-based business model in 1999, the company was unsuccessful in turning its analog compilation technology into a profitable business. "It's a sad tale of how great technology can go wrong," said Joe Costello, Barcelona chairman and former CEO of Cadence Design Systems Inc. Costello confirmed that Barcelona, which won around $44 million in venture capital funding, is winding down its operations and seeking a buyer for its technology. Barcelona was formed in the late 1990's by Stanford University PhDs and Silicon Valley venture capitalists. The company claimed breakthrough analog synthesis technology, and pioneered a Web-based model through which designers would access the technology on a pay-per-use basis. Customers would license Barcelona's intellectual property (IP) along with its synthesis tool, then use the tool to optimize circuits for a specific process. Barcelona started with small circuits such as op amps, but that wasn't a big enough business for the expectations that had been set for the company, Costello noted. So Barcelona started chasing the "holy grail" of large IP blocks such as PLLs, A/D converters, and D/A converters. The problem, Costello noted, is that those large IP blocks were very complicated to design, given the need to account for process variations. And there wasn't as much of a market as the company had hoped. "It was more or less a service and consulting type of business, and it was a niche," he said. Last June Barcelona announced that it was swapping its IP-based model for a more conventional EDA licensing scheme. At that time, the company cut its 60-some staff roughly in half. But Costello said that the switch to an EDA model didn't really happen. Instead, he said, Barcelona started looking at ways to extend its analog compiler technology into the digital domain. That was a promising direction, but it was clear there was no "quick hit," Costello said. So the board decided that it was time to call it quits. The Barcelona web site has been shut down, but the company's office is still open with a small crew that's in the process of winding things up and showing the technology to potential buyers. "The morality tale," Costello said, "is that wonderful technology that can add tremendous value to the world doesn't necessarily make a giant home-run company." | |
All material on this site Copyright © 2005 CMP Media LLC. All rights reserved. Privacy Statement | Your California Privacy Rights | Terms of Service | |
Related News
- Sandbridge Selects Barcelona's Analog Solutions to Speed Up Time-to-Market and Increase Flexibility
- Toshiba Adopts Barcelona's Analog Synthesis Solutions
- Barcelona tips analog IP 'engines'
- Thalia adds analog and mixed-signal IP reuse to Siemens' Cre8Ventures Digital Twin Marketplace
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |