FPGA merger with processors gathers steam

San Francisco — Programmable-logic vendors increasingly are looking to embedded processor cores as a way to exploit the higher logic densities and lower costs coming from Moore's Law scaling. And system-on-chip (SoC) vendors are beginning to add programmable logic to their designs as well, offering flexibility to the increasing numbers of customers dealing with changing standards.

At the Embedded Systems Conference (ESC) here earlier this month, Actel Corp. and ARM Ltd. announced a collaboration to put a modified version of the popular ARM7TDMI-S core on Actel's ProASIC3 FPGAs. The partners will remove the cache and memory-management control functions normally on board the ARM7, and make other modifications targeted at embedded markets, said Dennis Kish, vice president of marketing at Actel.

At the Microprocessor Summit during ESC, Xilinx Corp. announced an extension to its PowerPC-based offerings. The auxiliary processing unit (APU) complements the PowerPC 405 core, connecting algorithms implemented in the programmable logic with applications running on the core. The APU supports PowerPC floating-point instructions, APU load-and-store instructions, and at least eight user-defined instructions capable of handling suboperations codes with 128 bits of data.

Dan Isaacs, director of marketing for embedded processors in Xilinx's advanced-products division, said that the APU can work with either the PowerPC core or "soft coprocessors that are vectored off in parallel." He described an unnamed video customer that seeks to use the APU to connect with coprocessors optimized to handle 8-byte pixel data.

"Within just a few cycles, the APU in a single operation can move 16 bytes of data, providing acceleration to application-specific algorithms," Isaacs said.

Xilinx supports two soft cores, PicoBlaze and MicroBlaze, aimed at low- and midrange embedded applications. The company offers them with an integrated development suite named Platform Studio. At ESC, Xilinx said it will work with Agilent Technologies Inc. to integrate a logic analyzer, Chipscope, into the Xilinx tool chain.

Tim Erjavec, a marketing manager at Xilinx, said the company now offers versions of its Spartan 3E FPGAs costing only a few dollars each that are large enough to hold the soft-processor cores. "We are trying to change the way people look at this," he said. "Our umbrella message is that these are embedded processors and world-class tools that just happen to be based on FPGAs."

Several FPGA vendors, ranging from Actel and Altera to QuickLogic and Xilinx, have offered "hard" cores, instantiated alongside a large block of programmable logic, as well as "soft" processor cores, which run directly in the FPGA fabric.

Mike Markowitz, director of media relations at STMicroelectronics, said he believes ST is the first company to offer a third path: a commercial SoC with an embedded FPGA core licensed from a French intellectual-property developer named M2000 (Bivres, France). The SRAM-based fabric provides 4,000 lookup tables in 150,000 equivalent gates of programmable logic.

The GreenField-STW21000 is a system-on-chip design aimed at the wireless infrastructure market. ST said that it collaborated with a leading vendor of wireless infrastructure equipment in the definition of the ARM9-based device.

Markowitz said the use of an FPGA block provides "an additional layer of flexibility to system designers."

A designer who wishes to change an output from a high state to a low state could insert an inverter in the FPGA block, for example. And with the standards for third-generation cellular networks still in flux, the device's FPGA block would support hardware-level changes faster than changes made to the microcode would.

Besides the 330-Mips ARM9 core and the FPGA block, the GreenField processor includes 16 Mbits of embedded DRAM. It is priced at $25 apiece in volumes.